Convergence of methods to
facilitate verification
Formal and Simulation based
methods will work cooperatively
Logical and physical design
will co-develop versus todays more serial process
Both physically-aware
synthesis and optimization-capable layout tools will coexist
All tools will need to
embrace hierarchy to avoid unmanageable dB size
Mass acceptance of
higher-level language HDLs will be preceeded by availability of high QOR behavioral compilers
LINUX based computing
platforms will dominate EDA