( ESNUG 209 Item 4 ) ---------------------------------------------- [2/1/95]
Subject: (ESNUG 206 #4 208 #3) Set_Driving_Cell IS A Useless Command
> What you would expect is set_driving_cell compile the block assuming that
> the input port is being driven by the specified cell and that ALL of the
> rules pertaining to that cell would be considered during optimization. (It
> turns out that this is not at all the case.) The only thing that the cell
> is used for is to check timing. What this means is that the max_fanout and
> max_capacitance attributes on the specified cell are ignored during
> optimization!
From: [ Synopsys R&D and Synopsys Technical Support ]
John, currently, set_driving_cell is just a more accurate version of
set_drive; it allows the port to model the transition or load-dependent delay
of the external driving cell. Neither set_drive nor set_driving_cell have
any interaction with design rule attributes.
ESNUG 206 Item 4 (quoted above) requests that set_driving_cell also be used
to determine design rules such as max_capacitance, max_transition, and
max_fanout. This request will be considered during planning for future
versions of the tool. Star-23506 has been filed for this.
> If you're using the table lookup timing model with input transition & load
> capacitance as parameters, you really need the transition attribute because
> of the default transition if there's no attribute is 0 delay, perfect edge,
> which in our case results in 0 gate delay. We also found this
> counterintuitive and expected set_driving_cell to operate as the user
> describes, i.e. set_driving_cell replaces and supercedes set_drive.
ESNUG 208 Item 3 (quoted above) brings up a different issue. The nonlinear
delay model allows a cell's output pin transition to depend on the transition
on the input. This effect is usually small, but is important for smaller
geometries. set_driving_cell captures most of the information about such
cells, but does not specify what input transition to use when calculating the
port delay. A zero transition is assumed. This means that the delay of the
port will be slightly optimistic for driving cells where output transition
depends on input transition. This should not cause an output transition of
zero, however. Even with a perfect waveform at the input, if the output of
a gate is loaded, there will be nonzero transition time at the output. The
library should be characterized at zero input transition and nonzero load,
in addition to other data points.
set_driving_cell deletes information of set_drive (and vice versa). This
does not cause the above problem, however. What is needed is additional
information about the transition time on the input of the driving cell.
Enhancement Star-24306 has been filed for this request.
- [ Synopsys R&D and Synopsys Technical Support ]
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