( ESNUG 228 Item 1 ) ---------------------------------------------- [10/20/95]
From: sonksen@dt.wdc.com (Brad Sonksen)
Subject: How To Piss Off Your Synopsys Salesman By Minimizing DW Useage
John,
Here's an example way to minimize usage of DesignWare licenses (in this case
"SynLib-ALU") that may be of interest to ESNUG readers. When compiling for
the first time, HDL-Compiler may call up a SynLib-ALU license to get the job
done. Under many circumstances the compiled design is then written out in a
hierarchical format, with DesignWare components written out as separate
submodules in the compiled netlist. The problem comes when you want to
re-optimze the design for timing, or whatever. Ideally you don't want to
have Synopsys call up the SynLib-ALU license again for the re-compile. These
licenses are expensive (~$15K), and are most likely in short supply compared
to the standard Design-Compiler licenses. However, when the previously
compiled hierarchical design with DesignWare components is read in, it will
automatically tie up SynLib-ALU license and potentially cause other designers
to wait, or pay more money for another license!
To get around this, simply write out all designs to be re-compiled as *flat*
netlists. This eliminates the DesignWare component reference in the module
names and also stops Synopsys from calling up the "SynLib-ALU" license on a
re-compile of structural code inside these designs.
- Brad Sonksen
Western Digital Corp.
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