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From: Scott Nogueira <scottn@m2p.scs.philips.com>
Subject: Watch Out! -- The LMC PCI Master Model is Memory Hog!
Hi John,
I've recently reported to Synopsys that the Release 8 of the LMC PCI Master
model, for use with Verilog, seems to have a memory leak of some sort. My
Verilog-XL simulations grow with each LMC command executed, until finally
there is no memory left and VERILOG-XL dies.
Just wanted to flag this to your avid readers and also ask if anyone else
has seen this ?
- Scott Nogueira, an EDA Plus Consultant
at Philips Semiconductor
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