( ESNUG 255 Item 5 ) -------------------------------------------- [11/14/96]
Subject: ( ESNUG 253 #3) Forced JTAG Insertion Especially When I Don't Want It
> I am using Synopsys 34b. Irrespective of whether the set_port_is_pad
> attribute is set or not, insert_jtag always adds JTAG_BSR for all ports
> of my core block! ( And I do not want to make all my design ports to be
> JTAGed!! Due to performance reasons, I want only a few of them to have
> boundary scan cells and avoid it for the rest!)
>
> I tried all options, nothing seems to work to stop this forced JTAGing.
> Is it a bug with Synopsys 34b Test Compiler or what ?
From: [ A Helpful Synopsys TC CAE ]
John,
The set_port_is_pad command applies to pad synthesis, not to boundary
scan register definition.
Test Compiler has the ability to generate a boundary scan register
which contains only a subset of the ports in a design. The only
command which explicitly excludes design ports from the boundary scan
register is "set_jtag_port false {port_list}".
Unless insert_jtag is invoked with -no_pads option, Test Compiler
performs pad synthesis along with JTAG synthesis on all ports which
contain the port_is_pad attribute. The only exception is those ports
which are listed in the port_list of the set_jtag_port false command.
The design ports given the port_list of this command are excluded from
pad synthesis.
Therefore, if a customer wants to exclude ports from the boundary scan
register but yet perform pad synthesis on all I/O in the design, the
following sequence of commands will accomplish this:
set_jtag_port false {port_list}
insert_jtag
set_port_is_pad {find (port, "*")}
insert_pads
> Also, I would like to use my own JTAG_BSRIN instead of Synopsys JTAG.db
> modules. How can I tell the Test Compiler to use it?
The methodology associated with developing and using boundary scan
components other than the ones defined in the Synopsys jtag.db is
documented in the "Using Custom Boundary Scan Cells" (version 3.4b) and
the "Test Compiler User Guide" (version 3.5a). These documents are
available in the Synopsys On-Line Documentation.
- [ A Helpful Synopsys TC CAE ]
|
|
