( ESNUG 257 Item 5 ) -------------------------------------------- [12/12/96]
From: Charles Thomas <charlest@jna.com.au>
Subject: Mentor AL2 Vs. Synopsys W/ Floorplanning Mgr. In The "Down Under"
G'day John,
I have read with much interest many of your various articles and news
items regarding ASIC design and synthesis.
I am starting the design of my company's first ASIC which is a 35K gate
device with an additional 64kbits of RAM which will be manufactured by
LSI Logic using thir LCB6000K process.
I am now having to make a decision regarding the most appropriate
synthesis tool for my company to purchase. It basicaly boils down to
either Mentor Autologic II or Synopsys Design Compiler Expert which have
the following advantages/disadvantages:
Mentor advantages : cheap, locally supported, Exemplar Galileo will
be thrown in
disadvantages : small market share, unknown future
particularly regarding enhanced features. Less
likely to be supported by ASIC vendors
Synopsys advantages : large market share, plausible long term
development strategy, recommended by LSI
Logic for their design flow.
disadvantages : expensive, support out of Singapore - not local
We want a tool that will last, but cost and support are also an issue.
As we have little previous experience in this area, this decision is not
an easy one for us to make.
Things are a little bit unclear regarding the interaction betwen
floorplanning/layout and synthesis. Both Mentor and Synopsys are telling
me that I don't really need to be worrying about the ability to
backannotate RC path delay info from floorplanning/layout back into the
synthesiser to re-optimise the circuit prior to routing. Mentor claim
that AL2 supports this for LSI Logic should I want to do it (do I
believe them?) and Synopsys say I can do it with their Floorplanning
Manager tool (for an extra US$60K (list)).
I would have thought that this sort of feature would have been required
by anyone doing an ASIC design using a 0.5um or less technology but due to
my lack of experience in this area I am not sure if I am correct.
I realise that you must get many questions from people all the time, but I
would very much appreciate it if you could spare the time to answer the
following few questions.
- Do Synopsys users in general use Floorplanning Manager?
- Is Floorplanning Manager required to backannotate floorplanning/layout
RC data?
- Is Autologic 2 likely to support this functionality at no extra cost?
- Any other comments you would care to make regarding the choice of a
synthesis tool?
Thank you for bearing with me.
- Charles Thomas
JNA Telecommunications Limited, Chatswood, AUSTRALIA v
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