( ESNUG 264 Item 4 ) -------------------------------------------- [9/3/97]
Subject: (ESNUG 263 #5) Seeking Tips For Efficient Adder Carry Out Designs
> A question for ESNUG readers. In February, at SNUG, I learned about the
> "hdlin_use_cin = true" switch to coerce Design Compiler to use the
> carry-in input on synthesized adders. Is there a similar switch to coerce
> Design Compiler to use the carry-out output on adders? How do ESNUG
> readers get better carry-out results when HDL coding for adder-inference?
From: Zia Khan <zkhan@pcocd2.intel.com>
John:
In your recent ESNUG someone mentioned that using the hdlin_use_cin flag
is helpful. Can you throw more light on it? (e.g. what does it do, what
are the benefits, any particular info on the most appropriate time
to use it?)
Thanks,
- Zia Khan
Intel Corp
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