( ESNUG 268 Item 4 ) -------------------------------------------- [10/9/97]

Subject: ( ESNUG 267 Item 10 )  Synopsys Vs. Altera Max-Plus II For FPGAs

> I am planning a design using large Altera Flex 10K parts.  I was planning
> on using Synopsys with VHDL, which we have at our company. I recently
> attended a training class at Altera on Max-Plus. The Max Plus tool
> seemed so outstanding with the Graphic editor, Paramaterized Megafunctions,
> etc that I am having second thoughts on using Synopsys/VHDL in favor of a
> combination of the Altera Graphic Editor and AHDL (Altera's HDL). With the
> paramaterized megafuncions, the schematic design entry does not seem as
> arcane and low level as one would think, and I was told that AHDL would
> probably give me the most efficient synthesis for the Altera Parts. Using
> Synopsys here would seem to make my job much more complicated. I would not
> be able to use all the Max-Plus compiler, LPM, and other features that I
> was so impressed with. Having to deal with cross application interfacing,
> edif files, and having synopsys/Altera point to each other if a problem
> arises scares me. I do plan on simulating in ViewSim, so I cannot avoid
> cross applications totally. I do realize that VHDL would help over AHDL if
> I planned on re-porting the design to a different Vendor's IC, however for
> this I would consider Altera's VHDL package. I would appreciate any user
> feedback.


From: "J. Darren Parker" <darren.parker@tempe.vlsi.com>

I really like the Altera Graphic Editor. You should use it for all parts
of your design that are specific to this project, e.g. address decoders.
Also, the top-level of your design should be a Graphic Editor file that
connects all your schematic and HDL blocks together. 

Any part of the design that is generic and can be re-used should be
written in VHDL and compiled with Synopsys Design Compiler. Try to limit
the levels of hierarchy to 2 or 3, so Synopsys will be able to optimize
it easily. Writing VHDL isn't nearly as fun as drawing a schematic with
Altera's Graphic Editor, but your end-product can be re-used on many
future designs.

I wouldn't buy Altera's VHDL package since you already have Synopsys,
and it won't give you the vendor independence that Synopsys does.

The Synopsys sales rep. will want you to buy FPGA Compiler which is
supposed to give better results than Design Compiler for Altera designs.
Stick with good ole' Design Compiler.  The extra expense and hassle of
FPGA Compiler isn't worth it.

  - J. Darren Parker
    VLSI Technology, Inc.



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