( ESNUG 281 Item 1 ) ------------------------------------------------ [2/19/98]
Subject: (ESNUG 280 #7) Need Help Doing Synopsys-HSPICE Correlation
> First of all, thanks for all the great information presented in the ESUG
> postings. We are doing some Synopsys to hspice correlation. I am
> interested if anyone has an idea of how to automatically generate the input
> vector that correlates to the report_timing static analysis. In my
> particular case I am dealing with an asynchronous logic block, so there are
> no flip flops to disturb the path. Any ideas anyone?
>
> - Dave Schaefer
> Logical Silicon Solutions
From: rramsay1@ford.com (Rodney Ramsay)
John,
I think "report_timing -true -justify" is supposed to do what you're asking
for but it's pretty worthless for multipliers and other complex circuits.
- Rod Ramsay
Ford Microelectronics Colorado Springs, Colorado
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From: krag@lsil.com (Kevin R. Grotjohn)
John,
This is easy IF you have a DesignTime license, otherwise it could be real
difficult. Try report_timing -true. This searches the critical path for
the input vector meeded to exercise the path -- pruning those paths that
cannot be exercised. It reports the vector for the most critical true
path that it finds.
- Kevin Grotjohn
LSI Logic
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