( ESNUG 283 Item 7 ) ------------------------------------------------ [3/5/98]
Subject: (ESNUG 281 #5 282 #5) The Future Of FPGA Synthesis W/ Synopsys
> Synthesis is also an issue. Design Compiler for FPGA's from Synopsys
> generally is beaten out for last place by ViewLogic for quality of
> synthesis and .... should be mothballed.
From: Pavel Zivny <pavelz@mdhost.cse.tek.com>
John,
That seems to be what Synopsys is doing, if I understand it right
they plan to end up with two flavors of the FPGA Express - one will be a
pushbutton and the other will have some understading of DC scripts.
Internally both will be the 'Express', _not_ the 'Compiler'.
Not bad, but there is a downside to this: IMHO there is a value in
having one and the same tool for both the prototyping FPGA and the ASIC
you end up in eventually; and DC was the one way to do it.
Indeed there is enough value in it to justify the lower "QoR" (just
love that Quality of Result :-) for many prototyping situations - e.g. so
what if you needed to up the FPGA size, it's for the prototype only. You
could keep your scripts (mostly), and there was less of a danger that some
HDL construct would be understood differently by your asic synthesis and
differently by the fpga synthesis.
- Pavel Zivny
Tektronix
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