( ESNUG 286 Item 7 ) ---------------------------------------------- [4/13/98]
From: tsuhua@tsuhua-ultra.cisco.com (Tsu-Hua Wang)
Subject: Free FSM Analysis Tool "cisco_fsm" For Verilog Based Designers
Greetings,
I would like to announce a FREE finite state machine (cisco_fsm) analysis
tools. In next few days, we will release cisco_fsm on a limited basis
(i.e. you cannot develop Cisco competing products by applying cisco_fsm
tools and only a Solaris version is available.) Please go visit:
http://www.employees.org/~ciscofsm and come to our presentation at IVC'98,
http://www.hdlcon.org.
cisco_fsm features:
- automatically extract fsms from Verilog files
- fsm static verification (reachability tool)
- fsm dynamic verification (coverage tool)
- fsm visual verification (bubble diagram tool)
- Text to graphics
To use this tool you must you have to also download AT&T's "dot" tool at
http://www.research.att.com/sw/tools/graphviz
- Tsu-Hua Wang, Ph.D.
Cisco Systems
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