( ESNUG 287 Item 2 ) ---------------------------------------------- [4/30/98]

Subject: ( ESNUG 286 #11 ) Seeking Many Decimal Digits Delays On Inputs

> I was wondering if anyone knows an easy way to automatically set the drive
> at each pin such that I am assured that there is, say, 0.5ns at all inputs.
> The set_drive command will work, but I need to know the capacitance at
> each input port in order to set each pin's drive correctly, e.g. set_drive
> <0.5ns/capacitance> <input_port>.  The problem is knowing each input's
> capacitance.  I've tried to get the capacitance attribute by using the
> 'get_attribute' command, unsuccessfully.  I finally wrote a Perl script
> to create a set of set_drive commands, based on a report using the
> 'report_net' command.  The problem with that is, the resolution is only
> to 2 decimal places (load field):
>
>     Net        Fanout     Fanin      Load   Resistance    Pins  
>    ------------------------------------------------------------
>    INPUT_1         1         1       0.01      0.00        2
>    INPUT_2         1         1       0.01      0.00        2
>
> "Load" here may be 0.0149 or 0.0101 - so you don't generate a very precise
> drive value this way.  I don't want to change my lib input capacitances
> from pF to fF right now.  That would certainly help in the report.  Any
> other ideas?
>
>   - Chuck Bellman
>     Motorola NCSG SemiCustom


From: "Russell Ray" <rray@msai.mea.com>

John,

Since he already mentioned that he used the get_attribute command, I'm not
sure if he has tried this, he probably has.

I have had to use this for other things, too, and have found it to be a
pain.  But, the only way to get all the digits in the library file is to
either have the library file (which most of us can't get) or use the
get_attribute command.

I have used the report_lib, get_attribute, and perl to create the scripts I
wanted.  The report_lib piped to a file so that I would have a list of all
the library cells (sounds like you already know these).  Then I use perl to
create a dc script that would run get_attribute on each of the cells and
their input pins.  All dc_shell output goes to a file.  Then I use another
perl script to process the output of dc_shell to create my script (in his
case, the set_drive script).

It is all very messy and time consuming, but it does work.

  - Russell Ray
    Mitsubishi Semiconductor               Durham, NC

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From: Scott Evans <scott@NPLab.Com>

John,

You may want to try report_net -verbose -connections.  An example:

Connections for net 'ck$ck_gen$n1531':
    pin capacitance:    0.063
    wire capacitance:   0.170708
    total capacitance:  0.233708
    wire resistance:    0.101727
    number of drivers:  1
    number of loads:    5
    number of pins:     6
 
    Driver Pins              Type                  Pin Cap
    ------------             ----------------      --------
    ck$ck_gen$U427/O         Output Pin (INV1L)    0
 
    Load Pins                Type                  Pin Cap
    ------------             ----------------      --------
    ck$ck_gen$count4_reg_4/SEL Input Pin (DFZN)    0.0126
    ck$ck_gen$count4_reg_3/SEL Input Pin (DFZN)    0.0126
    ck$ck_gen$count4_reg_2/SEL Input Pin (DFZN)    0.0126
    ck$ck_gen$count4_reg_1/SEL Input Pin (DFZN)    0.0126
    ck$ck_gen$count4_reg_0/SEL Input Pin (DFZN)    0.0126

It provides a lot more detail.

  - Scott Evans
    NeoParadigm Labs                    San Jose, CA

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From: David Cassetti <david.cassetti@tempe.vlsi.com>

John,

You might want to read Solvit article synth-022860.html.  The gist of it
is, you can do something like:

  set load 100000 your_input_port
  set drive .000005 your_input_port

This will give you a delay of 0.5 ns

  - David Cassetti
    VLSI Technology                        Tempe, AZ

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From: Paul Fletcher <paulf@chdasic.sps.mot.com>

John,

Give this a try, I have done some of this type of work to add constraints
to an existing library to get better synthesis results, so I new how to
get these values.

  T_L = cdr1synPwcshV300T125

  remove_varilable capacitance_attribute > /dev/null

  wild = "*"   /* used so wild carding does not look like a "C" comment */
  _DRIVE = "1" /* all 1 x drive cells */
  cap_attr = 0.0  /* make sure this is a float */
 
  foreach(cell_name, find(cell,T_L + "/" + wild + _DRIVE) {
    pinlst = filter(find(pin,cell_name + "/" + wild), "@port_direction ==in") > /dev/null
    echo cell_name pinlst
    foreach(pinn,pinlst) {
      list pinn
      cap_attr = get_attribute(find(pin,cell_name + "/" + pinn) capacitance)
      list cap_attr
    }
  }

You can remove the echo and list commands and add commands to use the data
this returns.  Here is an example of what the script returns:

  cdr1synPwcshV300T125/sdffps_1 {sb, d, ck, sdi, se}
  pinn = "sb"
  Performing get_attribute on port 'sb'. 
  capacitance_attribute = {0.015935}
  pinn = "d"
  Performing get_attribute on port 'd'. 
  capacitance_attribute = {0.010037}
  pinn = "ck"
  Performing get_attribute on port 'ck'. 
  capacitance_attribute = {0.006111}
  pinn = "sdi"
  Performing get_attribute on port 'sdi'. 
  capacitance_attribute = {0.007052}
  pinn = "se"
  Performing get_attribute on port 'se'. 
  capacitance_attribute = {0.010471}

Hope this helps.

  - Paul Fletcher
    Motorola                                   Chandler, AZ

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From: "Stickel, Tedd K" <Tedd.Stickel@unisys.com>

John -- to characterize library timing I've used a large set_load on
all inputs, say 5000pF, and then a small set_drive, say .0001 on those
same inputs.  The large set_load washes out any intrinsic pin C. 

  - Tedd Stickel
    Unisys



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