( ESNUG 287 Item 7 ) ---------------------------------------------- [4/30/98]
From: plaberge@micronpc.com ( Paul LaBerge )
Subject: DC 98.02 Has Screwed Up Timing With The LSI Logic lcbg10p Library
Hi John,
We came upon a bug in 1998.02 using the LSI Logic lcbg10p library.
DC doesn't see the correct timing while optimizing, therefore it doesn't
give good results for timing. Later when report_timing is done the correct
timing shows up. It has something to do with min cap in the library.
If you have the problem you'll see the delta delay at zero, but your timing
report will show a negative slack.
WORKAROUND:
remove_attribute lib_name + "/*/*" min_capacitance > /dev/null
- Paul LaBerge
Micron
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