( ESNUG 288 Item 3 ) ----------------------------------------------- [5/7/98]
Subject: ( ESNUG 287 #1 ) Verilog, VHDL, NT, Unix & Ron Collett's Bad Advice
> Before coming to Systems Science, I worked for Zycad over 6 years. Ron
> was contracted and, as a stipulation, would speak to the company about his
> vision of the simulation-environment-of-the-future. Ron assuredly promoted
> the demise of Verilog in favor of the upcoming contender, VHDL.
>
> After my first experience hearing Ron's presentation, I was always
> very skeptical of his market analysis. In 1996, it hit directly in my
> realm when he avoided the VHDL-versus-Verilog topic and began to harp on
> the demise of the workstation platform in favor of NT.
From: landmh@taec.toshiba.com (Howard Landman)
John,
Has Ron Collett ever been right about anything?
One of Claude Shannon's theorems is that an information channel which is
perfectly wrong transmits just as much information as one which is perfectly
right.
So, I always pay utmost attention to Ron Collett. I read his conclusions
assiduously, and them act boldly, in complete confidence that whatever
he predicted isn't going to happen. I just hope he never predicts that
the sun is going to rise tomorrow morning.
One of Ron's other great predictions was that UNIX was doomed, that shipments
would peak in 1997 and then decline. This prediction was made not long
before the World Wide Web exploded and Sun Microsystems stock increased in
value by 10X in less than 2 years. And let's not forget LINUX ...
I can't tell you how good it makes me feel to have Ron predicting that NT
will wipe out UNIX. It means I won't have to switch for a long, long time.
(Technical nit: Isn't NT Posix compliant? That means NT *is* UNIX, even
if only an unreliable form of it.)
I hope my competition switches to NT.
> the hybrid environment: A workgroup of users working on NT platforms
> with one or 2 Sun workstations acting as servers for "serious work".
All my work is serious work,
- Howard Landman
Toshiba America Electronic Components
---- ---- ---- ---- ---- ---- ----
> ... Zycad's ViP was not the victim of a Verilog vs VHDL market struggle,
> but of the following facts:
>
> 1) ViP was a very early exploration on "how to" and most importantly
> "how not to" accelerate VHDL execution.
> 2) ViP's architecture was the antithesis of the KISS principle.
> 3) ViP machines were extremely difficult to use.
> 4) ViP machines never came close to provide a return on investment
> even to die hard VHDL users.
>
> - Gabe Moretti
> Chair VHDL International
> VP Engineering, VeriBest, Inc.
From: Ramesh Narayanaswamy <nramesh@ganesh-systems.com>
John:
I take exception to some of Gabe Moretti's comments regarding the ViP.
I worked on the ViP product and worked with every prospective client and
the dozen or so paying customers.
I don't believe Gabe knows much if anything about the architecture of
the ViP or its usage.
His approach seems to be, let us rubbish this dead product and company
to defend VHDL.
In reality the ViP was a extremely simple multiprocessor built for VHDL
execution; two versions of the engine were built and both worked cleanly
the first time. The software was no more complex than the essential
complexity of VHDL.
The real issue was, the architecture was betting on parallelism in the
user designs. So performance was very design dependent; for the design
styles/designs that had reasonable parallelism the machine could deliver
10-25x speedup over the best software solution, the customers who saw
this level of performance bought the machine. One of the customers who
was getting good performance bought a bunch of boards for good money
even after the product was killed. For other designs speedup could be as
low as 2-3x and it did not make sense for the customer to spend $150K
for a hardware solution; he could just wait for the next generation
workstation and spend $30-40K instead.
Some aspects of VHDL had significant if peripheral impact on the ViP.
The complexity of the language led us to release early versions of the
product that only supported a sub-set of the language. It obviously was
difficult to use when the compiler rejected some of your code. :-)
The fact that none of the major processor design groups (Intel, AMD, MIPS,
Sun, etc.) which spend the big bucks in high end verification (emulators,
cycle simulators, gate accelerators etc.) used VHDL was an issue. This
meant the traditional early adopters who would take the effort to modify
coding style, etc., to get the performance were not available.
- Ramesh Narayanaswamy
Ganesh Systems
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