( ESNUG 313 Item 1 ) ---------------------------------------------- [3/10/99]
From: "Terry Ragsdale" <ragsdale_terry@jpmorgan.com>
Subject: Bigwig Wall Street Analyst Wants To Connect With Engineers
John,
I am a securities analyst covering semiconductors at J.P. Morgan, and I
spend a fair bit of my time on Altera, Xilinx, Lattice, and LSI Logic.
Somebody recently suggested to me that I would probably learn a lot from
ESNUG. Is it as simple as just asking to be added to the mailing list? If
so, please do.
Separately, I'd like to develop some contacts among designers so that I
have some live people that I can ask about things like whether Xilinx's
Spartan is truly a useful device or too de-featured to be of any use and
whether Lattice's new BIG family (8000 I think) is going to make it. Also
about things like whether the minimum order quantities for ASICs are
getting so big that PLDs are indeed likely to take a larger share of
low-gate-count ASICs. Virtex vs. APEX, etc.
Do you have any suggestions about how I might find such people? I honestly
don't know what their incentive to talk to me would be, other than the
minor ego gratification of educating a Wall Street analyst on what's really
going on out there. I do find most engineers that I come across are quite
willing to talk, as long as the conversations are brief. I try to attend
PLDCon every year, but I'm often trying to do 12 things at the same time,
and my networking nevers seems to work very well.
Anyway, thanks for any counsel you can give me.
- Terry Ragsdale
J.P. Morgan
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