( ESNUG 313 Item 10 ) --------------------------------------------- [3/10/99]

From: doron nisenbaum <doron@chipx.co.il>
Subject: Has Anybody Made A Verilog Model Of An Analog Phase-Locked Loop ?

Hi.

I am trying to build a Verilog model of an analog pll.  Has anybody done
this?  It's suppose to have the same characteristics of a real analog pll
including the loop-filter and Vco.

My model is almost done, but I have control problems in some situations.

Help is needed !!!

    - Doron Nisenbaum
      Chip Express (Israel) LTD.                Haifa , Israel
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