( ESNUG 313 Item 13 ) --------------------------------------------- [3/10/99]
Subject: ( ESNUG 311 #14 ) A List Of The Hidden Synopsys Variables
> As we all know Synopsys DC has many hidden variables and switches for
> different purposes. A few years ago someone published them on ESNUG.
> Could you send a list of hidden variables and switches again for review,
> so we don't have to do so much research to get those information.
>
> - Steve Hwang
From: David C Black <dcblack@qualis.com>
John,
I would like to make several observations on this:
1. Synopsys hidden variables are hidden because they are typically:
a. Only for very specify purposes which are very infrequent
b. Can ruin or cause havoc to most designs
c. Invoke beta-level (or perhaps even alpha-level) code
d. Require other knowledge and must be used in conjunction with
other variables in a very specific manner.
2. These hidden variables change from one release to the next and are
NOT SUPPORTED by Synopsys. If you use one and the next version of the
tools don't support it, too bad.
3. You can extract a list of all ASCII strings from any executable file
in UNIX with the 'strings' command, thusly:
% strings NAME_OF_EXECUTABLE_GOES_HERE | sort -u >SAVED.txt
Information extracted via the above has several characteristics:
a. It is large (possibly a megabyte or more)
b. It will expose all the variables, commands and messages used
by the program examined.
c. The information has no documentation.
d. Nobody in their right mind would use this on a real design.
e. It may violate your licensing agreement.
Bottom line: Don't use this information unless directed to by Synopsys
personnel, and even then USE EXTREME CAUTION. Finding alternatives to
using hidden variables/switches is much better.
NOTE: You could use this technique on other vendors tools with the same
warnings.
- David Black
Qualis Design Austin, Texas
---- ---- ---- ---- ---- ---- ----
From: Peter Kamphuis <kamphuis@hl.siemens.de>
John,
What I have tried is the following:
strings dc_shell_exec | grep hdlin_
This will generate a list of "hdlin" variables. Same can be done with
"compile_", "bc_", etc. Of course, some lines will contain data that
have nothing to do with the variables. A problem that I see, however,
is how do I set a variable that I have found but that is not
documented? "false", "true", "low", "high", "0", "1"
... and what will the effect be?
- Peter Kamphuis
Siemens AG Munich
---- ---- ---- ---- ---- ---- ----
From: [ Bit Mole ]
John,
Please keep this anonymous. Should you use this, sign me [ Bit Mole ].
Steve Hwang's post about finding hidden variables got me thinking. I
went into mole mode and burrowed into dc_shell to see what I'd find.
The result is the following list of undocumented variables and their
default values, which might be useful. "Undocumented" here means that
they exist when dc_shell starts up, but have no man page exists. Whether
this indicates hidden features or spotty documentation is unknown. Whether
the variables do anything useful is left as an exercise for the reader.
This was done with dc_shell 1998.08.
activate_boi : false
allow_newer_db_files : false
annotation_control : 64
arch_init_path : $SYNOPSYS/sparcOS5/motif/syn/uid
bc_create_assign_op_activation : false
bc_create_busses : true
bc_create_logic_op_activation : true
bc_create_read_op_activation : true
bc_create_write_op_activation : true
bc_dont_group_logic : false
bc_enable_logic_data_select : true
bc_force_balanced_branches : never
bc_group_logic_size : small
bc_name_eql_logic : true
bc_use_old_group : false
bin_path : $SYNOPSYS/sparcOS5/syn/bin
channel_width_denominator : 7
channel_width_numerator : 4
checkout_feature_list :
combine_vertical_logic_groups : true
compile_characterize_black_boxes : false
compile_clean_inverters : false
compile_dst_optimization : default
compile_new_gate_sizing : false
compile_preserve_sync_resets : false
compile_promote_delay_cost : false
compile_restrict_down_sizing : false
compile_resyn_duplicate_logic : false
compile_resyn_new : false
compile_routing_utilization : 0.000000
compile_use_fast_sequential_mode : false
current_fmgr_file : 26c5557
current_highlight_layer : <<undefined>>
current_instance : <<undefined>>
current_reference : <<undefined>>
db_database : 3we45d5
dcm_calc_mode : W
dp_prob_analysis : false
eco_allow_hierarchical_names : true
eco_connect_resource_cell_inputs : true
eco_find_trails : false
eco_output_isomorphic : false
eco_output_name_aligned : false
eco_recycle_verbose : true
fast_partitioning : true
filter_check_real_by_default : true
font_library : 1_25.font
gen_ignore_bus_bit_order : false
hdlin_dont_check_param_width : false
hdlin_enable_analysis_info_for_analyze : true
hdlin_latch_synch_set_reset : false
hdlin_minimize_tree_delay : TRUE
hdlin_reg_test_print : FALSE
hdlin_report_resource_costs : FALSE
hdlin_resource_sharing_mode : AUTOMATIC
hdlin_share_common_subexpressions : TRUE
hdlin_share_effort : LOW
hdlin_tdrs_script_source :
hier_dont_trace_ungroup : 0
init_path : $SYNOPSYS/auxx/syn
lbo_lfo_enable_at_pin_count : 3
left_justify_logic_constants : false
level_sensitive_startpoint_close_active_edge : 0
link_path : {class.db}
logic_group_height_percent : 95
logic_group_width_percent : 95
man_path : $SYNOPSYS/doc/syn/man
mgi_disable_server_mode : false
mgi_scratch_directory : .
mgi_server_mode_timout : 48.000000
motif_files : $SYNOPSYS/admin/setup
motorola_input_edge_rate : 0.000000
output_order : {}
port_edge_rate : 0.000000
power_clock_gating_dont_check_library : false
power_dont_hookup_testports : false
power_gated_clock_logic : and buf
power_reg_size_threshold : 3
power_test_enable : false
power_test_enable_pin : TEST_MODE
power_test_obs_logic : false
power_test_obs_logic_depth : 5
preserve_subshells : {hdl_shell_exec}
prioritize_link_order : true
product_build_date : Jun 25, 1998
product_version : 1998.08
report_product_version :
sc_check_file_existence : false
scc_execute_sh_command : false
scc_print_usage_message : false
sheet_fill_percent : 100
sheet_hard_limit : true
sheet_orientation : landscape
sheet_size : infinite
sheet_sizes : {A, B, C, D, E, infinite, mentor_maximum, sge_maximum}
synlib_debug_mode : {}
synlib_preferred_library : {}
synlib_wait_for_design_license : {}
synopsys_program_name : dc_shell
synopsys_root : $SYNOPSYS
target_systems : {}
test_allow_clock_convergence : false
test_enable_post_capture_checks : 3
test_force_bidir_pads_inwards : -2
test_force_capture_clocks : false
test_no_three_state_conflicts_after_capture : 0
test_synchronization_elem_support : 1
test_user_test_data_register_naming_style : UTDR%d
text_threshold : 6
text_unselect_on_button_press : true
tsdrc_bidir_port_checks : 7
user_home_path : $HOME
verilogout_time_scale : 1.000000
verilogout_top_instance_name : u1
vhdllib_unigen_first : true
vhdlout_upcase : FALSE
view_banner_font : 9x15
view_busy_during_selection : true
view_designs_set : 0
view_draw_text_breakpoint : 0.010000
view_extend_thick_lines : true
view_icon_font : 8x13
view_icon_path : $SYNOPSYS/auxx/syn/icons
view_independent_dialogs : {test_report, Test Reports, report_print,
Report, report_options, Report Options, report_win, Report Output,
manual_page, Manual Page }
view_maximum_route_grids : 0
view_pixels_per_route_grid : 0
view_select_default_message : Left Button: Select - Middle Button:
Add/Modify Select - Right Button: Menu
view_select_separator : -
view_set_cursor_area : 5
view_use_integer_scaling : false
view_watcher : $SYNOPSYS/sparcOS5/syn/bin/da_watcher_exec
view_win_height : 500
view_win_width : 600
working_path : (current working directory)
Some of the variables above include "$SYNOPSYS", "$HOME", or "(current
working directory)" in the default value. Really they all have an
absolute path, but I edited them to stay anonymous.
- [ Bit Mole ]
[ Editor's Note: I changed the values for current_fmgr_file & db_database
because I take requests for anonymity *very* seriously. Although I'm
unsure, these two mysteriously encoded numbers looked like they might
have IDed "Bit Mole". Rather than risk it, I changed them. - John ]
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