( ESNUG 314 Item 2 ) ---------------------------------------------- [3/17/99]
Subject: ( ESNUG 313 #17 ) Should I Go To SNUG'99 Or To DAC'99?
> I'm a self-employed consultant who has to pay his own way to any conference
> I attend. Should I spend my money going to the upcoming SNUG'99 or on
> DAC'99 in June? I'm interested in "technical", not "industry" stuff. Are
> either of these conferences worth it?
>
> - Greg Bell
From: "Clifford E. Cummings" <cliffc@sunburst-design.com>
John -
I too am a self-employed consultant (like you and Greg) and I believe SNUG
is the best technical conference, period.
It also happens to be one of the more affordable conferences. I must admit
that I am on the SNUG technical committee, but I only joined last year
after attending SNUG for the past four years. The quantity of good papers
that have been submitted this year is great.
My take on conferences is:
SNUG - by far the most technical and the best. Great focus on HDL and
synthesis techniques and issues.
IHDL (former IVC) still pretty good, but a fair number of marketing and
purely academic presentations.
DAC - best trinkets conference, a big party, lots of secret vendor
suites, interesting ESNUG follow-ups, but the papers are all over the
map. There are some good papers if you look hard enough.
Just one opinion.
- Cliff Cummings
Sunburst Design Beaverton, OR
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From: David C Black <dcblack@qualis.com>
John,
I was surprised recently when a client told me that they recommended SNUG
to their verification co-workers as the best technical conference to
attend. I believe they are planning to attend. That's quite a statement
for a group that doesn't use synthesis.
- David Black
Qualis Design
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From: jcooley@world.std.com ( John Cooley )
Greg,
OK, I fully admit that I'm going to be a very biased person on this because
of all the user noise I regularly direct at Synopsys, Inc., but that's
exactly why I go to SNUG. That is, for years we've kept SNUG *user* driven
and *expressly* forbid any Synopsys sales or marketing people in to "smooze"
the customers. Also, we've kept the papers and presentations very *user*
biased -- customers are encouraged to share their "success" *and* real life
horror stories at SNUG. (Heck, last year Howard Landman of Toshiba gave
such an embarrassing talk about Design Compiler's unpredictibility (complete
with detailed benchmarks) and Synopsys wrote a rebuttal!)
On a personal level, I've recently become very curious about creating low
power designs. Why? Because, on an engineer-goes-artsy-fartsy level,
they have this unique elegance you don't find in everyday bread & butter
FASTER-FASTER-FASTER designs. So where will you find me at SNUG'99?
"Automatic Clock Gating For Power Reduction"
by Zia Khan and Gaurav Mehta of Intel
"Power Optimization in the Real World: Do's and Don'ts for
System-On-Chip Designs"
by Mike Gladden of Motorola and Iandraneel Das of Synopsys
"New Clock Gating Feature in Power Compiler 1999.05"
by Roberto Zafalon of STMicroelectronics
And I'll also be at quite a few other talks, too. Hope to see ya there.
- John Cooley
the ESNUG guy
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