( ESNUG 319 Item 13 ) -------------------------------------------- [5/26/99]
Subject: ( ESNUG 318 #6 ) Cooley And Collett Live In Different Worlds
> However, I'm a reasonable guy, & I'm willing to give you a second chance,
> because perhaps you have gained lots of insight into what what kind of
> design methodologies will be needed in the future -- I hope so for your
> client's sake. What do you think the chip design methodology will look
> like 4 years from now? What are the issues? What will the solution space
> look like? What does the design environment look like? Be specific.
>
> - Ron Collett
> Collett International Santa Clara, CA
From: "Roberta Fulton" <Roberta.Fulton@xilinx.com>
John,
I have some sympathy for both Ron Collett and you, John, having been both a
real ASIC designer plus a semiconductor application and technical marketing
engineer trying to develop future methodologies for tomorrow's issues. As
a designer I was usually annoyed at not having today's problem's totally
solved and the EDA companies on my back trying to sell me a tool I really
didn't need yet (or at all) while trying to meet the deadline that was
already three weeks late before it was given to me.
Now on the other side of the fence, I am trying to access what the customers
might want tomorrow when they don't even know or to avoid uselessly try to
develop a market for a product that nobody would buy in a million years...
Its been eye-opening to walk a mile in the other gal's shoes.
- Roberta Fulton
Xilinx, Inc.
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