( ESNUG 320 Item 12 ) --------------------------------------------- [6/2/99]
Subject: ( ESNUG 319 #6 ) Modelsim/Verilog-XL SDF Lib Conflicts W/ DC 99.05
> I'm trying to do a post-synthesis simulation with Modelsim EE 5.2, using
> the VITAL lib of my ASIC vendor. ... I don't know if I produce wrongly the
> SDF/VHDL files from Synopsys DC 99.05 (I use the SDF v2.1 format). Is
> there any chance that the vendor ASIC VITAL models are not 100% VITAL
> compatible, as said in the Modelsim user manual?
From: Todd Kline <todd@wgate.com>
The only SDF based problem I have had with Modelsim was with Verilog models.
Verilog-XL has extended features which are not supported in Modelsim. I
have never had a problem with VHDL models.
Since you are not sure about you SDF file generation, are you using the -c
VHDL and -f sdf-v2.1 switches?
- Todd Kline
Wgate
|
|
