( ESNUG 320 Item 13 ) --------------------------------------------- [6/2/99]
From: [ A Test Products CAE ]
Subject: Test Compiler / DC-XP Uses Excessive Memory With Tri-State Logic
John
Hi! One of our customers hit a nasty, defect with DC-XP / Test Compiler
that causes excessive memory usage by the insert_scan command while
inserting three-state enabling/disabling logic. The defect has actually
been there for two and a half years, and has only just been discovered,
so we don't think that too many customers will hit it. However we'd like
to spread the word rather than run the risk. I'm pleased to say that:
a) The defect is fixed in the 1999.05-3 Cluster Release
b) There is a workaround for those using other releases
The defect is in how DC-XP's insert_scan command handles library cells with
a large number of input or inout pins. You are most likely to encounter
this problem with a memory cell, but could encounter it with other cells.
You will see this limitation only under the following conditions:
1. There is a library model of a cell with an output bus that has the
three_state attribute defined in the library
2. There are multiple drivers on the output bus
3. The number of pins on the library cell that are defined as inputs,
or as inouts, is greater than 16.
4. Your library cell is not a black-box.
If you hit this defect you will see insert_scan run very slowly indeed
during the insertion of enabling/disabling logic and, in the extreme case,
you will get an "out of memory" error. If you do not wish to install the
1999.05-3 Release then the workaround to overcome this limitation is to
create an alternative model to use during scan insertion. Create a
"bit-blasted" structural model of the memory cells that uses single
three-state buffers to model the 3-state functionality of the memory cell,
and relink your design to use this structural model rather than the
original library cell. Then, once you have completed scan insertion you
can relink to your original model.
SOLVIT Test-242.html gives full details of the workaround.
- [ A Test Products CAE ]
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