( ESNUG 329 Item 17 ) --------------------------------------------- [9/22/99]
From: Eran Rotem <eran@chipx.co.il>
Subject: Cadence 'Pearl' And Synopsys DC Just *Won't* Play Nice Together
Hello John,
First I would like to thank you for your column, it is helpful, colourful
and very interesting.
I would like to ask a question. We, Chip Express are an ASIC vendor. We
are now in the process of developing a layout flow that is using Timing
Driven Q-place placement software from Cadence. Being timing-driven, the
software reads constraint files produced by, you guessed it -- Synopsys.
The tool that reads and converts the constraint file is: Pearl (Cadence
static timing analysis tool). We are receiving Synopsys constraint files
from various Synopsys versions. Almost each time we use Pearl there are
statements that are not recognised by the tool, and causes it to produce
erroneous output.
The only thing we can do is manually change the constraint file, and try
again. As I said , we get different "types" of constraint files, depending
on the Synopsys version used. Does anyone know of a formal / informal way
to overcome this problem ?
- Eran Rotem
Chip Express (Israel) Ltd. Haifa, Israel
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