( ESNUG 335 Item 4 ) ---------------------------------------------- [11/3/99]
From: Ronald Niederhagen <ronald@synopsys.com>
Subject: SNUG'00 Europe -- 'Abstract' Deadline Extended Until November 30
Hi, John,
Due to some scheduling issues, we've extended the deadline to submit
abstracts for SNUG'00 Europe to November 30th, 1999.
If your European readers have information on high-level or physical
design methodology, or experiences with Synopsys tools that would be of
interest to other users, please encourage to present in one of the sessions
listed below.
- Design Compiler, Low Power, Datapath Design
- SoC Design Flow
- Verification of large systems, including Hardware-Software
co-verification
- Static Timing Analysis and Formal Verification
- Physical/Transistor Level Design and Verification
To submit an Abstract, send a summary paragraph to "SNUGEurope@synopsys.com"
and we'll take it from there. If they need help writing their Abstract,
tell them to feel free to contact their local AC. They'll help. For more
information on SNUG'00 Europe, visit http://www.snug-universal.org/
- Ronald Niederhagen
EuroSNUG'00 Technical Chair Munich, Germany
|
|
