( ESNUG 336 Item 2 ) -------------------------------------------- [11/11/99]
Subject: ( ESNUG 323 #16 ) What Are Your Thoughts About ACS In DC 99.10 ?
Since the Synopsys marketingdroids have been yarping about Automatated Chip
Synthesis (ACS) being included in DC 99.10, I thought it would be a good
idea to post this user quote:
"Synopsys Automated Chip Synthesis (ACS) automates a "Partition and
Budget" flow. This scalable top-down approach means that synthesis
goals defined at the top level are automatically translated to lower
levels. Constraints and scripts are automatically generated to
implement a fully automated divide and conquer methodology. ACS
achieves faster run time through parallelism. It has a fully automated
interface to LSF and GNUmake queuing packages. ACS affords automated
design-data management. As an example of an ACS application Synopsys
cite a 2-Million gate graphics chip with 1.5M synthesizable gates and
5 clocks ranging from 33MHz to 100MHz which synthesizes on 7 CPUs in 8
hours. It achieves a 3% area reduction and a 15% timing improvement
over DC??"
That quote was from the responses to my DAC'99 user survey 4 months ago. My
questions to the ESNUG readers are: 1) Are you using ACS now? 2) What do
you think of it? 3) Is it useful/lame/in-between?
- John Cooley
the ESNUG guy
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