( ESNUG 345 Item 8 ) ---------------------------------------------- [3/1/00]
From: Carl Christensen <carl.christensen@philips.com>
Subject: Bogus TCL "Help" Files In FPGA Express Trashes Xilinx GSR Mapping
Hi, John,
I use the TCL based scripting of FPGA Express to automate my synthesis. I
ran into a problem when I tried to set a switch to ignore unlinked cells
when mapping the GSR (Global Set Reset) for a Xilinx part. In the GUI there
is a switch when editing constraints that you set if you want to ignore
unlinked cells. The normal reason for this is if you are using a core of
some type. Anyway the FST documentation is pretty limited but in this case
it appears to have the exact information I needed. It clearly states that
there is a pre-defined variable:
proj_gsr_ignore_unlinked_cells = "yes" (default)
Wait a minute if it's default was "yes" it should have already been doing
what I want. After trying to set the thing to "yes" every which way and at
every point in my script without any luck, I finally used the printvar
command to confirm that in fact the variable doesn't exist at all. (With
TCL's declare at usage it does after you try to change the value.) The
correct way to ignore unlinked cells for GSR insertion is with the
set_chip_gsr_ignore_unlinked_cells
command. Which isn't mentioned at all in the windows help pages. Thanks to
Loren Lacy at Xilinx for helping me find the correct command. If you use
FST you've probably found that most of the information is only in the man
pages. There is also a help available from the shell. For example help
*gsr* brings up the set_chip_gsr_ignore_unlinked_cells command which you can
then to a man page on. I'm not sure if the "windows help" mentions the
command line help if it does I missed it somewhere. It's not super useful
but at this point anything on FST can be helpful.
I believe the same issue would apply to FPGA Compiler II also.
- Carl Christensen
Philips Digital Video Systems
|
|
