( ESNUG 354 Item 2 ) ---------------------------------------------- [6/1/00]
Subject: ( ESNUG 352 #1 ) ClockWise? Use Free QPopt changeClock Instead!
> I recently taped out a design on which I inserted clock trees using the
> Ultima ClockWise tool and really liked it. In the past I have used
> intentional skew in special situations to help improve timing, but it
> was difficult time consuming hand work...
>
> - Jon Stahl, Principal Engineer
> Avici Systems N. Billerica, MA
From: Bobby Mozumder
Hi, John,
(Fair Warning: I work in Cadence methodolgy consulting, so my experiences
are with Cadence tools.)
You've been really getting into ClockWise lately. I have to ask. Why buy
a new tool when you can use the exact same functionality in your existing
Cadence tools? In case anyone has not mentioned this to you yet, QPopt is
also capable of modifying the clock tree to meet timing. This is a new
capability in QPopt that other people may know about, although QPopt has
been around a while.
For those unfamiliar with QPopt, it is the placement based optimizer within
QPlace, the Cadence standard cell placer and part of the Silicon Ensemble
suite of tools. QPopt performs basic operations such as cell upsizing and
downsizing (including of Flip-Flops), and buffer insertion and removal. It
doesn't perform placement based logic restructuring. For that you would
use PKS.
Anyways, the clock skewing capability of QPopt is simply an additional set
of transforms that QPopt is allowed to perform to meet timing. It adds
clock insertion delay to meet setup timing. The timing constraints are
given to QPopt in GCF Format, a systems level constraints format (contains
clock frequencies, IO timings, and exceptions). Pearl is the timing engine
inside QPlace that handles the GCF constraints. You would use the clock
skewing capability after building a clock tree with CTGen, then performing
propagated clock timing optimizations with QPopt.
You could feed it an RSPF file from HyperExtract, or it will internally
generates its own through its global router (the same global routing code
that is in PKS and WarpRoute).
This flow has obvious advantages over manual editing or using third-party
point-tools such as ClockWise. Mainly that the timing engine, Pearl, is
shared with the rest of the Place and Route tool. Also, it is a systems
level constraints (GCF based) timing optimizer, rather than a clock-tree
builder. This means you don't have to make the flow any more complex than
what it is. Just let the tool do whatever it can to meet your systems
timing (including IO timing requirements). It will also fix hold
violations, if any, by itself.
For those using the Pearl based QPopt, just add "changeClock" along with
the usual "upsize+downsize+bufferInsert+bufferDelete" to the
optAllowedOperation qplace config option. An example qplace.config file:
inputFormat SiliconEnsemble
lefName "tech.lef ../LIBRARY/LEF/cells.lef"
defName "design.def"
inputGCFConstraints "design_worst.gcf"
inputGCFTimingLibraries "design_worst.gcf"
defOutName "design.def"
outputFullDef TRUE
timingMode TRUE
timingDrivenRouting TRUE
placePin "refine"
optScanChain TRUE
optTimingType "setup+hold+maxTran+maxLoad"
optAllowedOperation
"upsize+downsize+bufferInsert+bufferDelete+changeClock+resizeFlops"
optSignalIntegrityType "xtalk+selfHeat+hotElectron"
optReportName "RPT/qpopt.rpt"
timingReportName "RPT/qp.timing.rpt"
The changeClock feature is not alpha or beta code. It's just another
(currently hidden) option within the tool. Silicon Ensemble users should
get qplace 5.1.62 (or the latest) tarkits.
- Bobby Mozumder
Cadence Columbia, MD
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