( ESNUG 361 Item 7 ) --------------------------------------------- [11/16/00]
Subject: ( ESNUG 360 #4 ) Suns Crap Out -- WSJ, SGI, Linux, HPs, PC Farms
> I was wondering if I could poll the ESNUG community for recent experiences
> regarding the use of HP workstations instead of Sun as a platform for EDA.
>
> The reason I bring this up is that we have had a ridiculous amount of
> trouble with our Sun hardware and software over the last few years, and we
> are at the point of researching alternatives.
>
> Now, before I get a bunch of responses along the vein of "these people
> must not know what they are doing because we have used Sun for X+ years
> and have never had a problem"; I ask the reader to postulate the following
> things:
>
> 1) We also have X+ years of Sun hw/sw experience and started out as Sun
> bigots a few years ago.
>
> 2) Without going into details, we have had an unreasonable amount of
> trouble with our current Sun hw/sw (hardware being big E6000 and E6500
> servers.)
>
> 3) We have explored all reasonable avenues of resolving our problems with
> Sun, paying top dollar for the highest level of support, and even
> replacing all of our hardware in spite of the fact that diagnostics
> did not show errors.
>
> Our top concerns are that we may switch and find ourselves with the same
> set of problems with HP workstations -- that our EDA software may not be
> as stable, or supported as well, or even exist on the HP platform.
>
> (Yes, we've seen the recent news of the Sun memory failure "cover-up".
> Some of our problems may have this root cause, but most do not.)
>
> - Jon Stahl
> Avici Systems, Inc. N. Billerica, MA
From: Scott Evans <scott@sonicsinc.com>
Hi, John,
Here's a URL for the recent article the Wall Street Journal just did on the
problems customers are having with Sun servers.
http://www.zdnet.com/zdnn/stories/news/0,4586,2651406,00.html
I think Jon Stahl will get some small comfort in knowing he's not alone.
- Scott Evans
Sonics Inc. Mountain View, CA
---- ---- ---- ---- ---- ---- ----
From: [ A Horse With No Name ]
John,
Please don't reveal who I am.
I do chip design for Agilent, which recently spun off from HP. As a result
I have almost no experience using Sun HW/SW. And I am surrounded by HP
bigots. But I am also a Linux user. In some ways I prefer Linux. So you
can take my word any way you want.
Long ago we had lots of trouble with HP HW. It was just flakey. But for
the past 10 years at least I have been impressed that the HPUX platform has
been rock solid. (HP PCs are not worth their price, but you didn't ask
about them.) That continues to today.
With one exception. NFS sucks. Its about 1% of intrinsic speed, on a good
day. We are running HPUX 10, and 11 is out. It's possible that HPUX 11
fixes NFS. I understand that NFS is updated in 11.
Without knowing your design flow, I don't know if all the apps will be
supported. Our flow uses a combination of standard tools and internal
tools. But all the biggies run HPUX.
But be aware that your internal software will take some time to port from
Sun to HPUX. The OSs are different. Both C and shell scripts will run into
glitches. The Unix base they started from had bugs. Sun and HP fixed
different bugs. When you port software you won't notice the bugs that
disappear. But you will definitely notice the new ones. Its no fun. But
on the plus side, after you are done porting, your software will be better
for it.
- [ A Horse With No Name ]
---- ---- ---- ---- ---- ---- ----
From: [ From The Land Of Hello Kitty ]
Hi John,
Pls keep me anonymous. I am working as a designer/CAE/EDA engineer. We
also have the same kind of problems as Jon. SUNs' performance is poor
before UltraSPARC-III, support quality is also poor. Also their description
for E-cache problem was unclear at the the time we got ploblems.
We used to think about buying HPs, but decided not because:
1. HP seems pricy than SUN (at least in Japan).
2. at the time we made purchase this year, SUN was the 1st priority
platform for Cadence. But recently Cadence announced they make HP
as the 1st one.
3. We have bunch of SUNs :-)
4. SUN has much more installed base than HP in general.
So if you have any trouble rather than EDA tools,
you can find many good resources on the Net to solve it by yourself.
Things has been changing so fast.
Since we do not do any big designs, IA/Linux is becoming a good candicate
for HDL designers. ( not for analog/layout designers though ).
By the way, does anybody use Alphas as EDA platform?
- [ From The Land Of Hello Kitty ]
---- ---- ---- ---- ---- ---- ----
From: Tony Laundrie <atl@sgi.com>
John,
We ported Synopsys tools to Linux using SGI systems and the run times are
great. See
http://biz.yahoo.com/bw/001009/ca_synopsy.html
http://www.sgi.com/linux/
On top of the regular Linux OS, SGI provides a ProPack layer of additional
tools to improve reliability and server performance.
- Tony Laundrie
SGI
---- ---- ---- ---- ---- ---- ----
From: Alain Raynaud <alain@tensilica.com>
John,
For a while I've been wrestling with the question: "Should we switch our
simulation jobs to a farm of fast, cheap PCs?" I benchmarked a 1 GHz PC,
fully loaded, running Linux, against one of our Sun servers (400 MHz
UltraSparc). The results? Not what I expected.
For VHDL simulation (using a leading VHDL simulator), the PC was 25%
faster than the Sparc.
For Verilog simulation (again, with a leading Verilog simulator), the PC
and the Sparc had exactly the same performance.
So what is going on here?
I have done other measurements with 600 MHz PCs, and the results scale as
you would expect. Keep in mind that I'm testing our RTL design only, so it
may not be your typical design. But that's what we care about. Cache size
and memory subsystem performance may matter more than pure MHz numbers.
In the interest of full disclosure, there is one job where the PC was 40%
faster than the Sparc. That confused me even more. (Also this benchmark
gave me the opportunity to compare simulation speeds for the exact same
design written in VHDL and Verilog. While I can't publish the detailed
results, I can confirm that VHDL simulation is slower than Verilog.)
- Alain Raynaud
Tensilica, Inc. Santa Clara, CA
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