( ESNUG 364 Item 4 ) --------------------------------------------- [02/01/01]
From: Jim Whitaker <jim.whittaker@powervr.com>
Subject: A Quickie Report Of A 0.18 TSMC Tape-Out Using Magma BastFusion
Hi John,
Read your newsletter each week - keep up the good work! I saw your request
for tapeout info, but hesitated to respond as we have not technically taped
out yet. We are however in good shape, and none of the remaining issues are
due to Magma. The chip is real and will be fabbed -- you can decide if this
counts or not! We have full chip LVS passing and 4 Antennas at top level to
fix plus a handful of DRCs - expect tapeout in the next 2 weeks. The design
is 13 Million transistors (LVS count), core clock 125Mhz in 0.18u TSMC
generic. The design is broken into 10 top level modules, 9 of which we did
P&R in Magma for and 1 remaining module (for historical reasons) plus the
top level are all done in Avanti. We get to DRC, LVS timing clean blocks in
1 pass through Magma, and hit our target timing (a first for us). The design
includes approx 50 ram macros, 3 clock domains and some analogue macros.
Placable instances per block 50-150k.
- Jim Whittaker
Imagination Technologies Germany
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