( ESNUG 376 Item 5 ) -------------------------------------------- [08/29/01]
Subject: ( DAC 01 #13 ) Synopsys Scirocco Review Based On Out-Of-Date Data
> SAME OLD, SAME OLD: If you take a look at last year's DAC Trip Report,
> you'll find that Cadence NC-Verilog & Synopsys VCS were fighting neck and
> neck; Model Tech were doing really well in the VHDL and Verilog/VHDL
> co-simulation market; and nobody was very impressed w/ Synopsys Scirocco.
From: "John Siddall" <siddall@synopsys.com>
Hi John
I was reading the comments regarding Scirocco in your DAC report and wanted
to respond to them. Most of the comments came from very old evaluations or
from our competitors(?), and I felt did not reflect the current state of the
product. We have made a major push to improve both the quality as well as
increase performance of the product in the last year since most of these
observations were made.
The current status today is that we have customers who are using Scirocco in
their production flow and regression farms. Most of these customers have
achieved performance results significantly faster (2-5x) then competitive
offerings, and in some cases achieving 10x or more when the cycle compiler
is used effectively. Obviously the type of coding style will affect actual
performance results, and so we do work with our customers and supply tools
(checkers, profilers, etc...) to help them tune their code and get the
highest performance. But overall we almost always handily beat the
competition in simulation performance.
Information regarding Scirocco and customer success stories was presented at
DAC in Las Vegas. I was informed you were not able to attend this, so our
Scirocco team would love to get a chance to discuss this further with you.
- John Siddall, Corp. Applications Manager
Synopsys, Inc.
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