( ESNUG 379 Item 12 ) ------------------------------------------- [10/11/01]
Subject: ( ESNUG 377 #13 ) How To Simulate 12.5 M Gate Designs In Verilog
> We started hitting the limits of our tried-and-tested simulation tools.
> I've tried a few different simulators on Solaris, but anything running at
> 32-bits will not cope. We hit the 4 Gb footprint limit. I'm now looking
> to using 64-bit simulators as a solution to our problem, Modelsim being
> the only one I've tried so far. Is this the only 64-bit simulator
> available at the moment?
>
> - Robert Hindle
> STMicroelectronics Bristol, UK
From: "Chris Browy" <cbrowy@avery-design.com>
Hi, John,
Avery offers solutions to provide scalable performance and capcity increases
for our Verilog simulations. Please take a look at Avery's products:
* SimCluster scalable distributed Verilog simulation that delivers
5-10X performance and capacity speedup, and
* TestWizard testbench automation offering Verilog and C/C++
transaction-based verification, protocol analysis, and functional
(architectural) coverage analysis
These products are part of our new SimLib add-on product series that extends
your existing Verilog simulator (VCS, NC-Verilog, MTI). SimLib add-ons are
Verilog PLI packages that link to the simulators you already own.
- Chris Browy
Avery Design Systems
---- ---- ---- ---- ---- ---- ----
From: "Bala Sreekandath" <bsreekan@synopsys.com>
Hi, John,
I am a member of the Applications group in Synopsys working with VCS. I saw
Robert's posting on ESNUG and wanted to get back to you to inform you that
VCS has a 64-bit port for Solaris and HP. This is officially not released
because typically VCS is very memory efficient and hence we don't have a big
demand from customers for the 64-bit port. But we have used this 64-bit
port very successfully at a few customer sites where they have had problems
with capacity issues.
We also have a mode where this 64-bit port can be run in a cross compiled
mode so that the compiles are done in the 64-bit mode and the simulations
can be still done in a 32-bit mode so that performance is not sacrificed
(64-bit ports usually run slower than the 32-bit ports).
- Bala Sreekandath
Synopsys
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