( ESNUG 392 Item 3 ) --------------------------------------------- [04/18/02]
Subject: Synopsys R&D Q&A To The SNUG'02 DC-Ultra Tutorial (Day 1)
30. Now that the FSM Compiler is auto-inferred by default, what changes
do you expect to see compared to regular compile without FSM Compiler?
Does it create a new hierarchy for the finite state machines (FSMs)?
No new hierarchy is created. Without FSM Compiler, the optimizations
specific to finite state machines are skipped.
31. Do you need to set_ultra_optimization for the new FSM flow?
Yes, the new FSM flow is a DC Ultra feature.
32. Does FSM Compiler optimize for power, based on the state transition?
No. The optimizations in FSM Compiler do not specifically take care
of area, timing, or power; the optimizations are independent of the
constraints.
33. Does FSM Compiler by default assign the state encoding automatically?
Yes. This can be changed by using the variable set_fsm_encoding_style.
By default, this is set to auto. It can be set to binary, gray, and
so on.
34. Do you need a Module Compiler license for the new data-path
optimization?
No Module Compiler license is needed.
35. Do you need a DesignWare Foundation license for the new data-path
optimization?
Yes, you need a DesignWare license.
36. Now that Design Compiler incorporates so many Module Compiler features,
are there any reasons to use Module Compiler separately?
Yes. For data-path intensive designs you might still want to use
Module Compiler. Certain features of Module Compiler such as like
internal rounding and auto-pipelining of the data path are not
available in Design Compiler.
37. How does the new data-path optimization engine handle instantiating
pipeline components from the DW Foundation library?
The new data-path optimization does not affect instantiated
DesignWare components.
38. How about using pipeline_design, balance_registers, and
optimize_registers with the new data-path optimization?
These commands work independently of the new data-path optimization.
39. How does auto-ungroup handle the different wire load model scenarios
in Physical Compiler?
Wire load models do not apply in Physical Compiler; they have no
effect on auto-ungroup in Physical Compiler.
40. Does auto-ungroup ungroup the entire hierarchy or only the cell?
Auto-ungroup ungroups the entire hierarchy of the subblock
41. How does auto-ungroup compare to boundary optimization?
Auto-ungroup allows Design Compiler to work on a larger cone of
logic. It is more powerful than boundary optimization.
42. Does set_ungroup false on a block affect boundary optimization?
No, they work independently of each other.
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