( DAC 99 Item 18 ) ----------------------------------------------- [6/25/99]

 IS THE ESDA MARKET FLATTENING OUT?  That quote: "A [ Mentor ] Renoir
 developer told me they're being (or about to be) re-deployed on other
 products.  Renoir will be placed into maintenance only mode." says a lot.
 The top four execs at Summit Design ( http://www.summit-design.com ):
 their CEO, VP of Sales, VP of Marketing, and CFO have all recently quit
 even though Summit has roughly $20 to $25 million in the bank.  Escalade
 ( http://www.escalade.com ) now focuses on IP reuse and doesn't even
 mention ESDA tools in the DAC'99 Exhibit Guide write-up.  Novas Software
 ( http://www.novassoft.com ), the remnants of Summit, and TransLogic
 ( http://www.translogiccorp.com ) seem to be the only ones hyping next
 generation ESDA developments now.

    "Product: Novas DeBussy  Rating: 3 gators (out of a possible 4 gators)

     After hearing so much interest from Eric, Jeff, and Karthik, I took
     a look at the tool myself.  Debussy is a design debug/verification
     tool that is coupled with the Verilog simulator of your choice.  I
     was also impressed by the state machine tool which extracts the state
     machine diagram from the RTL code and shows the transition sequences,
     the schematic drawer (both RTL and gates can be drawn), and the
     automatic driver/logic cone tools.  It seems to be a good tool and
     would be very useful in helping people figure out IP obtained from
     other sources.  Debussy claims to have upgraded just in time for DAC!"

         - an anon engineer


    "Novas debussy adopted by Verplex and Verisure.  Seems we made
     the right decision going with Novas."

         - an anon engineer


    "Novas: HDL debug environment 'DeBussy'.  "Knowledge based."  Load
     verilog.  Browse verilog via code with hypertext links.  Waveform
     viewer: driven from compressed database (10x smaller than VCD file).
     Drag items of interest between HDL and wave windows.  Annotate source
     with transitions from cursor on waveform window.  All views are
     coupled.  Schematic editor (browser?) has coning capability.  4th
     part of suite is state machine recongition.  Appears to be good
     environment for focusing on simulation results.  Verification
     engineers might have a use for this."

         - an anon engineer