( SNUG 01 Item 22 ) -------------------------------------------- [ 3/28/01 ]
Subject: Synopsys Vera vs. Verisity Specman vs. Chronology (Forte)
THE HUNTER BECOMES THE HUNTED: Last year (actually 9 months ago) at DAC,
Verisity made a big thing about DataQuest reporting that Verisity owned
77 percent market share and it was obviously kicking Synopsys Vera butt.
But, like many things in EDA, there was an element of FUD here (it's there
always?) At the June 2000 DAC, the only DataQuest numbers available were
for the 1998 fiscal year. Here's the actual numbers:
Fiscal Year 1998 Market Share
Total 1998 Market: $13.6 million
Verisity Specman & 'E' ####################################### 77.8%
Synopsys Vera ######### 18.5%
Chronology RAVE ## 3.9%
Verisity was touting market share numbers which were 18 months old at that
time. Now the 1999 Dataquest numbers are in:
Fiscal Year 1999 Market Share
Total 1999 Market: $22.4 million
Verisity Specman & 'E' ################ 33%
Synopsys Vera ########################### 54%
Chronology RAVE ###### 13%
So it appears that Synopsys has pretty stolen this niche from Verisity. It
gets more interesting if you do some math. Verisity made .778 x 13.6 =
$10.6 million in 1998 and it made .33 x 22.4 = $7.4 million in 1999 -- they
not only lost market share, they also flat out lost $3 million in revenue!
Needless to say, the Synopsys Vera people are falling all over themselves
with this vindication. They're giddy as school kids. Guess it just shows
the power of having a walking talking million man EDA sales army.
Number of Vera licences sold (as reported by Synopsys)
1998 # 500
1999 ##### 2,500 - *
2000 ############## 7,000
(* - But back in Dec. 1999, they claimed 5,000 Vera users!)
"I got a real kick out of Synopsys trying to have something to say to
respond to Verisity's claim of a Dataquest 77 percent market share.
Bottom line to Synopsys' claim about having more installed seats of
Vera than Specman is that there are a lot of Synopsys sites with bins
of free licenses floating around. You can have the installed license
specsmanship award, Synopsys, but I'd look hard and long at the product
people are actually spending $$ on."
- an anon engineer from the DAC'00 Trip Report
"It's bad enough that we had VHDL/Verilog wars, but I absolutely dread
the Vera/E/Superlog war on top of it. What benefit does the
engineering community gain from additional languages like Vera and
Specman? Why do we need yet another language, and can't we just
extend the predominant one (Verilog) accordingly?"
- Gregg Lahti of Intel
"Session2: VERA - a test language
VERA basically seems to be an extra language that is Verilog-esque but
with some object oriented capabilities. OO is there to try to clean
up your stimulus world, as far as I can tell. Vera also has features
for controllable randomization of inputs. The general idea is to set
up a system in which you randomly apply input to your chip, where
"input" has been defined as a legal bus operation containing some
random data. At the same time a message is sent to an "expector"
routine telling it that you have done so. The expector remembers this,
so that when the response comes back, or later on when you read that
data out, it will check the contents to make sure the right number came
out. It also supports assertions for specifying bus handling to watch
for illegal states.
Looking at our internal simulation environment, I can imagine what a
pain in the butt clever stimulus systems are. Perhaps Vera's type of
OO system protects you from trying to do it all on your own.
However, it's a whole other language, and license. If we wait longer,
Verilog 2000 will add some "real" software features like more private
varaibles, reentrant tasks, etc. Then if the world really goes to
plan, SuperLog will add OO techniques into Verilog anyway. (I talked
to some folks at SNUG saying "all" the people that were on the
Verilog-2000 committee are now on the SuperLog committee, and it's
the "wave of the future!!!!" (Their exclamation points, not mine.))
My opinion is we should be pushing on Cadence to support all
Verilog-2000 features as soon as possible."
- Paul Gerlach of Tektronix
"What is the hold-up to releasing the Vera language specification?"
- Sami Nuwayser of Sun Microsystems
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