( SNUG 99 Item 15 ) ----------------------------------------------- [3/31/99]
THE MORE THINGS CHANGE, THE MORE THEY STAY THE SAME: Back in the medieval
ages of EDA (oh, about 5 years ago), two bloated companies (who possessed
all the spry agility of drunken elephants) had two mutually exclusive yet
critical monopolies in the chip design world. The queen with a plain face,
Cadence, owned Verilog simulation. The queen with a fair face, Synopsys,
owned synthesis. Of course, dear Cadence dabbled in synthesis with her
Synergy, but everyone knew it was a joke not to be taken seriously. And,
dear Synopsys also toyed with her VSS simulation, but everyone laughed
at how VSS was the base unit in the benchmarks. (That is, all the other
simulators were measured as "2.3X faster than VSS" or "5.4X faster than
VSS". Poor, poor VSS.)
Then, about two year ago, a small young upstart named Ambit started messing
with the Synopsys monopoly. Ambit was young, lean, and hungry for a nice
tasty chunk of the Synopsys monoply. (Gosh, in those days, Synopsys *upper
management* would even meet with the *lowly users* of Design Compiler at
SNUGs and ask users what they thought about Ambit, DC, and how to make DC
better! (I know, hard to believe, but it's true!)) Ambit staged little
raiding parties at SNUGs to show users their BuildGates synthesizer.
Synopsys upper managment got scared and pushed their R&D to completely
revamp Design Compiler to be faster, get better results, and use less
memory. And the customers always won because that pesky competition caused
*both* EDA tools to get better!
Then, like the Dooms Day Asteroid, our big bloated Cadence came crashing
in, bought Ambit for the princely sum of $260 million CASH (with all
the Ambit employees being fully vested!) and destroyed our world. Within
picoseconds all those nouveau riche Ambit employees (who had caused such
trouble for Synopsys), in unison, threw up their hands, said "well, our
job's done here!", and ran laughing all the way to the bank.
In addition, much drinking and merrymaking secretly went on at Synopsys,
too. Why? Because this purchase meant we're mostly back to "the good
olde days" of Cadence/Synergy. Sigh.... It's true. The more things
change, the more things stay the same.
"I am in absolute awe of him. I just want to fall at his feet and
say 'We're not worthy! We're not worthy!'. He got $260 million
in cash for a $10 million, maybe $20 million company. I'm in awe."
- a Synopsys marketingdroid describing Ambit CEO Prakash Bhalerao
"The 1997 synthesis market breaks out to:
Synopsys: 94.91100 percent
Ambit: 0.01314 percent
Mentor: 5.07586 percent
Yes, those old Mentor Autologics seats in the military outsold Ambit's
commercial seats by a ratio of around 380 to one."
- Analyst Gary Smith of Dataquest
Pissing and moaning aside, the DC'99 we're seeing right now in the Synopsys
roadshows is a direct result of competing with that pesky Ambit.
"Design Compiler speed improvements in 1999.05: they claim 2x for
normal compilations (I've seen over 3x) and 8x for chip-level (with
-top). DC will do placement AND global routing in a future version.
They are changing all the tools to 64-bit binaries, because people
are running into memory limits (currently, 3.7 Gbytes). They are
starting with the tools which typically work on a full chip: Design
Compiler, PrimeTime, layout optimizations, etc. The conversion
to 64 bits will take time and SNPS is concerned the tools will be
slower in that mode. In the meantime, they are working on reducing
the amount of memory they use."
- Oren Rubinstein of Gigapixel
"New in DC99: read-f verilog -netlist ( -netlist ignores syntax and
some other checking, but speeds up reading 2x)."
- Anon
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