( ESNUG 491 Item 2 ) -------------------------------------------- [04/14/11]
Subject: Users on Veriwell, Icarus, Altera Quartus, and Veripool Verilator
> Do any of your readers have experiences with the free or extremely cheap
> (under $500 per year) Verilog simulators like Icarus Verilog, VeriWell
> Verilog, Silvaco SILOS, or Sugawara Veritak in actual chip verification
> and design environments? Any horror stories?
>
> Are there any other cheap/free Verilog simulators that I'm missing?
>
> My skinflint boss wants me to look into making a Verilog server farm with
> as many PCs running Verilog as cheaply as possible. :(
>
> - from http://www.deepchip.com/items/0490-10.html
From: John Eaton <jt_eaton=user domain=opencores.org>
Hi John,
Open Sourced tools have come a long way but the simulators still have three
main drawbacks:
1) They are usually only one language. If you want both Verilog
and VHDL then buy a license.
2) They may drop some nice to have features. Want to do back
annotated gates? Sorry.
3) They sometimes interpret rather than compile code. This means
that they run at a fraction of the speed of commercial tools.
The big EDA companies really do spend the effort to optimise
their code.
That last one is a cost killer. You can rent a node from Amazon for 10 cents
an hour which is $876 per year plus a one-year Verilog license. Use a free
simulator that's 1/20th the speed and it is 20 X $876 for the same thing.
I wonder if your reader's pointy haired boss has figured in his floor space,
power and cooling costs ?
- John Eaton
Ouabache Designworks Portland, OR
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From: Jonah Probell <jonah=user domain=jonahprobell not mom>
Hi, John,
I have used Veriwell and Icarus. Veriwell is very simple to run, and so it
is good for quick short simulations while deubgging code. Veriwell is
interpreted and therefor relatively slow. Icarus is compiled and so it is
significantly faster. Both are open source. Neither does System Verilog.
I have also used Altera Quartus Web Edition as a free Verilog compiler with
helpful error/warning/lint messages for debugging. Of course Quartus is for
FPGA synthesis. It is not a simulator.
- Jonah Probell
YAP IP San Jose, CA
---- ---- ---- ---- ---- ---- ----
From: Bernard Deadman <bdeadman=user domain=sdvinc not mom>
Hi John,
So far we've been very pleased with the results/performance we get from
Verilator. I've recommended customers set it up in their own environment.
We tend to use Verilator to prove communication to/from smaller blocks, with
the big stuff ultimately run in our customers' co-emulation environment.
While Verilator seems to be targeted at the synthesizable sub-set of Verilog
we've found it goes beyond that, though it doesn't pretend to provide full
support for all the behavioral aspects of System Verilog.
In general the tool quality is good and we've had good support on the few
occasions we've needed it.
Provided the language subset fits your chip, I'd certainly recommend taking
a look at Verilator - it's definitely worth the effort.
- Bernard Deadman
SDV, Ltd. Bognor Regis, England
---- ---- ---- ---- ---- ---- ----
From: [ Fat Man ]
Hi John,
Keep me anon.
Your correspondent might want to look at Veripool Verilator.
http://www.veripool.org/wiki/verilator
I haven't used it myself but I have heard of it being used successfully
for ASIC design work in exactly the server farm context he mentions.
- [ Fat Man ]
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From: Johan Wouters <johan.wouters=user domain=ymatra.be>
Hi, John,
I've used Verilator extensively. It is fast, stable with good support.
Our main usage model was to have some $$$ commercial simulators (VCS,
ModelSim, NC-Sim) for their debugging, System Verilog etc. and next to
that Verilator was used to run parallel regressions. We then convert
our Verilog code into C++ to run in Matlab, Simulink and SystemC benches.
- Johan Wouters
Ymatra BVBA Ham, Belgium
---- ---- ---- ---- ---- ---- ----
From: [ Little Boy ]
Hi, John
Anon, please.
If he wants cheap he should try the Verilator (never used it though).
- [ Little Boy ]
---- ---- ---- ---- ---- ---- ----
From: Jason Campbell <jcampbell=user domain=winterlogic not mom>
Hi John,
At WinterLogic our main product is a functional fault simulator, "Z01X",
but we do offer a low cost Verilog/System Verilog logic simulator, too.
Our simulator supports the complete Verilog 1995, 2001 standards and we're
working on System Verilog 2009.
- Jason Campbell
WinterLogic, Inc. Roseville, MN
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