( ESNUG 505 Item 7 ) -------------------------------------------- [05/24/12]
Subject: Cooley must "eat crow" on both Palladium & Specman "e" at CDNlive
> I couldn't find any direct Palladium papers, but I did find (SYS201)
> by Juergen Jaeger of Cadence on FPGA-based prototyping with "ASIC
> to FPGA memory conversion, fast synthesis (~30 M gates/h), automatic
> multi-FPGA partitioning (~20 M gates/h)" then use "Palladium to debug
> the functionality." Hmmm....
>
> And in line with the Specman "e" controversy that's been brewing
> in ESNUG 501 #2 & 500 #3, I found no papers discussing Specman "e"
> in any serious way.
>
> - John Cooley of DeepChip.com
> http://www.deepchip.com/gadfly/gad051812.html
From: John Cooley <jcooley=user domain=zeroskew not calm>
Hi, DeepChippers,
It is to my great chagrin that I have to publically "eat crow" on these two
statements I had made above. Within less than 4 hours of publishing them,
I recieved an email:
From: Horace Chan <horace_chan=user domain=pmc-sierra not mom>
Hi John,
Actually I have a paper on using Specman with Palladium at CDNLive'12.
It was (SYV101) we gave on Tuesday 1:30-2:20 in Track 7.
Please see the attached PDF presentation.
- Horace Chan
PMC-Sierra, Inc. Sunnyvale, CA
And to my horror, I found a 23 paged paper by Horace Chan and Jeffrey Huang
of PMC-Sierra giving their detailed use of Palladium XP to accelerate their
Specman "e", UVM, System Verilog test suite.
OH, NOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOO!
In it, the paper said before Palladium, their simulation times:
- Could take hours to send a single frame.
- Running the full regression suite could take more than a week.
Because of these run-times:
- Interactive debug was difficult.
- It would take a long time to reproduce bugs.
- Their team had to create simpler simulations to get
reasonable simulation times.
With Palladium and Incisive IES, with their 26 M gate DUT:
Prior Simulation: 1 hr
Simulation Acceleration: 80 seconds
Which was a 40X speed-up they obtained with a "suboptimal testbench"; they
believed that if they used the Specman "e" profiler plus used faster servers
for IES plus did some reconfiguring of their DUT, their team believed "that
an additional 20x acceleration is easily achievable."
So I was wrong about *both* Palladium and Specman "e" not being discussed
at CDNlive'12. Wrong not on one thing; but two. D'oh! (CRAP!) Sorry.
- John Cooley
DeepChip.com Holliston, MA
Editor's Note: This paper is #67 in the DeepChip Downloads. - John
Join
Index
Next->Item
|
|
