( ESNUG 550 Item 7 ) -------------------------------------------- [05/22/15]

Subject: Chip designer questions MENT whitepaper claims about Tanner EDA

> LIFE OR DEATH?: A little over 2 months ago, MENT annouced that it bought
> Tanner EDA.  The untold story is John Tanner had a $28 million company
> that was $20 million in consulting and $8 million in "very inexpensive"
> quickie AMS design/layout/verification tools.  My spies tell me MENT
> bought the tools part for $14 million -- but MENT did not buy the Tanner
> consulting group at all.
>
> Now the big question is: "Did MENT buy Tanner tools just to scavenge the
> Tanner SW for bits to use in Pyxis, IC Station, and BDA projects?" or
> "Will MENT keep running Tanner EDA as is now -- selling "inexpensive"
> download-from-the-web AMS tools to cheap large node chip designers?"
>
>     - from http://www.deepchip.com/items/0550-04.html


From: [ Anand Paralkar of  Anutan Tech ]

Hi, John,

I just got a promotional email from Mentor directing me to their whitepaper
on Tanner EDA.  (I have also attached the paper in this email.)

Since you, John, are one of my reference points for all VLSI stuff, could
you please get some answers for these questions:

  1. How many chip designers have really tried this new "low cost
     design" stuff from the new Mentor-Tanner?  Have they taken a chip
     from spec to production using this "cost effective" tool set?

  2. Does this new Mentor-Tanner flow really have all the necessary
     verification and sign-off points built in?  Is this tool suite
     self sufficient or does it have to be supplemented with other
     "not-so-low-cost" tools?

  3. How low is "low cost"?  Can somebody tell us what it would cost
     to put together an end-to-end Mentor-Tanner tool suite?

And if I may ask you, do you think you can run these questions as a survey
(like you do for DAC edgy questions and the like)?

    - Anand Paralkar
      Anutan Tech Pvt Ltd                        Mumbai, India

        ----    ----    ----    ----    ----    ----    ----

  Editor's Note: This heavy marketing Mentor-Tanner "Cost Effective ASIC
  Design" whitepaper is #70 in DeepChip.com downloads section.   - John

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