( DAC 10 Item 9 ) ---------------------------------------------- [ 11/19/10 ]

Subject: Magma Tekton vs. Synopsys PrimeTime

WATCH OUT PRIMETIME:  As I predicted in my DAC Cheesy Must See List, this
year any form of non-Synopsys static and statistical timing analysis
seems to be of interest to users for two reasons.  The first reason is
technical: PrimeTime's source code is 15 years old and wasn't written with
multi-threading and multi-CPUs in mind.  The second is users want a viable
option to the PrimeTime monopoly.

As far as S/STA alternatives went at this DAC, Magma Tekton easily had the
most user mindshare with Extreme DA and CLK-DA getting honorable mentions.

     "What were the 3 or 4 most INTERESTING specific tools that
      you saw at DAC this year?  WHY where they interesting to you?"

         ----    ----    ----    ----    ----    ----   ----

   My 2nd choice is Magma's Tekton, which claims to be at least 10 to 20
   times faster in running STA analysis than PrimeTime.

       - [ An Anon Engineer ]

         ----    ----    ----    ----    ----    ----   ----

   Magma - Tekton:

   Magma's Tekton is very compelling.  The story is quiet impressive.  I'm
   not ready to commit to it, but it is the right step for Magma in terms of
   tool development.  They need to make sure that the plans are in place to
   integrate it with their P&R platform.

       - [ An Anon Engineer ]

         ----    ----    ----    ----    ----    ----   ----

   If it's real, Magma's Tekton is a game changer, most interesting new
   innovation at the show:

     - Ability to analyze all corner cases in one pass instead of
       having to run many corner cases is just awesome
     - Improved corner case reporting
     - Nice interactive analysis capabilities

   I think it's great that an EDA company is finally taking advantage of
   the multicore processing capabilities that often are idle.

       - [ An Anon Engineer ]

         ----    ----    ----    ----    ----    ----   ----

   I used Magma's Tekton static timing analyzer for early visibility of full
   chip timing while working on block level ECOs in Talus place and route.

   Overall, Tekton was almost 4x faster than Synopsys PrimeTime for single
   mode, single corner static timing analysis.

   Our benchmark for a 13 M gate, 5 M placeable instance design:

                Tekton run time: 108 minutes
             Primetime run time: 390 minutes

   For me personally, Tekton's combination of speed with decent correlation
   to our signoff timer is compelling.  I would love this fast turn timing
   analysis within our PnR loop to speed optimization iterations.

   For small designs we can tolerate slower speeds in return for actual
   signoff results, but for larger designs 8 hours vs. 2 hours can make the
   difference between 4 iterations in a day vs. stretching 1 overnight.

   I only tested Tekton on plain vanilla single mode, single corner analysis
   STA.  I haven't used it in multi-mode, multi-corner (MMMC) analysis, but
   Magma claims it can replace multiple, single scenario runs with a single
   run and get run times that are far better than 1X per scenario.

   For example, for 4 runs; 1 scenario per run

                    scenario 1 : run time == 1hr
                    scenario 2 : run time == 1hr
                    scenario 3 : run time == 1hr
                    scenario 4 : run time == 1hr

   If Tekton's speed was fundamentally 1X per scenario, run time for 1 run,
   4 scenarios per run (scenarios 1/2/3/4), would be 4 hrs.  (4 x 1 hour)

   Magma's claim is that Tekton's run time is less than 1X per scenario,
   with approx 20% overhead for the additional scenarios.   So for a 1 run,
   4 scenarios (scenarios 1/2/3/4), the run time would only take approx
   1.6 hrs.  (1 hr + .2 hr for each of the 3 additional runs).

       - [ An Anon Engineer ]

         ----    ----    ----    ----    ----    ----   ----

   I attended the Tekton/QCP timing analysis tool presentation.  I was
   impressed with the speed and the accuracy of the tool for a live
   multi-scenario STA timing session demo.

   I also attended the lib characterization and modeling presentation
   of the "SiliconSmart" product.  I liked the throughput, SPICE-level
   accuracy and thorough characterization of this tool as benchmarked 
   vs. other major EDA vendors.

       - Huy Nhu of Raytheon

         ----    ----    ----    ----    ----    ----   ----

   I attended a demo of Tekton in the Magma booth.  I understand that it
   runs very fast compared to PrimeTime.  I didn't get a clear answer from
   Magma regarding Tekton's accuracy.  For example, does it have path-based
   analysis mode and how fast will this run?

       - [ An Anon Engineer ]

         ----    ----    ----    ----    ----    ----   ----

   I attended Magma's "Guitar Hero" presentation on their new STA tool,
   Tekton.  Tekton seems to deal with multi-mode/corner operation of
   chips quite well, which would be an extremely useful for IC design.

       - Wangyang Zhang of Carnegie Mellon University

         ----    ----    ----    ----    ----    ----   ----

   Not sure what to think about Magma... they always like to make a lot of
   noise, and usually I just ignore it, but this time my interest has been
   piqued.  My group is going to give their technology a look in the coming
   year (especially Tekton STA and FineSim Fast SPICE) and see if there's
   fire behind all the smoke, or if it's just more pungent hot air created
   by indigestion.

       - [ An Anon Engineer ]

         ----    ----    ----    ----    ----    ----   ----

   It sure would be nice to see Tekton break the SNPS PrimeTime monopoly.

       - [ An Anon Engineer ]

         ----    ----    ----    ----    ----    ----   ----

   Next on my list would have been Extreme DA and Atoptech.  This year the
   theme seemed to be multi-mode and multi-corner.  Multi-objective
   optimization really seems to choke down the tools and kill the run
   times.  Even Extreme DA runs slower...   I am watching for companies
   that can truly handle this kind of analysis/opto without runtime
   hits or companies that can truly merge the modes, coroners, and
   leakage options and identify which part of the matrix is the sweet spot.

   For example, if I had a chip that could run from 90 to 110 MHz, could
   scale its voltage anywhere between .8 and 1.0 V, so I'd want to try
   3 different sets of voltage-frequency pairs.  I could build it to any
   of 3 types of leakage cells and had 8 operational modes to verify.  I'd
   have the make sure it runs in each version of silicon.  (SS/FF/TYP)
   That's 3*3*8*3 or 216 ways to build the chip and verify timing on this
   chip.  Hahaha...  But there is a local minima where the fastest, lowest
   power chip can be made -- the challenge is to find it.

   At this point, most tools can't even digest or analyze this scenario,
   leaving it up to engineers to run experiments and use intuition to
   narrow down the challenge.

       - [ An Anon Engineer ]

         ----    ----    ----    ----    ----    ----   ----

   Timing Signoff @ 45/32 nm -- Looks like a lot of activity both on the
   STA, SI and extraction front here.  In the past this area has been
   dominated by Primetime-SI / STAR.  Both tools look like they have
   active competition now.

   On the STA front, CLK-DA appears to have scaled back from last year,
   and Extreme-DA has a bigger presence with a pretty busy booth.  Extreme
   looks like there are getting traction in the industry touting POCV/SSTA
   and capacity, where PrimeTime is working on their capacity.  

   It will be interesting to see if someone can break the PT monopoly.

   On the extraction side, all companies except Synopsys appear to have
   been rewriting their signoff extractors.  They all look in their
   infancy, but we'll see if someone can finally get it right by designing
   an extractor targeting a multi-CPU environment with the quirks of
   smaller geometries and variation.

       - [ An Anon Engineer ]

         ----    ----    ----    ----    ----    ----   ----

   ClkDA's AmberPathFX was the most interesting tool I saw, mainly due to
   its apparent speed and accuracy advantages, support by TSMC, and
   integration into flows.  I haven't run it, so I can't say for sure that
   it really works, but the DAC demo stuff looks pretty good.

       - [ An Anon Engineer ]
Index    Next->Item







   
 Sign up for the DeepChip newsletter.
Email
 Read what EDA tool users really think.


Feedback About Wiretaps ESNUGs SIGN UP! Downloads Trip Reports Advertise

"Relax. This is a discussion. Anything said here is just one engineer's opinion. Email in your dissenting letter and it'll be published, too."
This Web Site Is Modified Every 2-3 Days
Copyright 1991-2024 John Cooley.  All Rights Reserved.
| Contact John Cooley | Webmaster | Legal | Feedback Form |

   !!!     "It's not a BUG,
  /o o\  /  it's a FEATURE!"
 (  >  )
  \ - / 
  _] [_     (jcooley 1991)