( DAC 11 Item 5 ) ----------------------------------------------- [09/28/11]
Subject: ICM IP Central and Magillem IP-XACT as #5 hot tool at DAC'11
TOLD YA SO: Seems like a bunch of users who attended this year's DAC in San
Diego agreed with my #1 recommendation in my Cheesy Must See List:
1) With all chips over 10 M gates being 99% IP, and the GSA saying 66% of
all IP is homegrown, IC Manage's IP Central helps design houses with
100's or 1000's of internal legacy IP make that IP actually reusable
in-house. When before you'd have a company HTML index of IP tarballs
with a few READMEs thrown in; now IP Central creates one *dynamic*
monster database of all *incremental dependencies* of EVERYTHING about
each IP. You get the IP source code, its testbenches, its many bug
relationships, its docs, who's using it, how it has changed, plus
how each specific change ripples through to other designs. Searchable
and claims to be open. "IP data can be imported or linked from CVS,
Subversion/SVN, Mercurial, Git, ClearCase, DesignSync, Enovia and
internal databases or file systems for a central view of IP assets."
- from http://www.deepchip.com/gadfly/gad060211.html
Turns out that there's also a small French start-up called "Magillem" that
appears to be doing something simular to IP Central but more at the PCB
level? (It's not clear.) Regardless, ICM IP Central got the lion's share
of user mindshare at this DAC.
"What were the 3 or 4 most INTERESTING specific tools that
you saw at DAC this year? WHY where they interesting to you?"
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From what I saw of the IP Central demo at DAC, the tool itself is
definitely a great idea. It's a pain to manage all the internal as
well as external IP available throughout our company. From the
demo IP Central had:
- A centralized repository
- A searchable database where IP user can do advanced
search combining multiple search criteria
- Flexibility for IP developers to tag the IP properties
- Encapsulate the IP where verification testbench and other
related files are linked
- IP importing into the repository seems to be easy
- Security setting at admin level for IP access, IP bug
tracking and IP usage
- IP tracking
It was definitely one of the more interesting products to see at
this year's DAC.
- [ An Anon Engineer ]
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Lots happening with IC Manage this year.
Their IP Central does IP reuse and project status tracking.
IP Central's core mechanic is adding properties onto your IP, that are
searchable/promotable throughout the projects they're incorporated into.
These properties can be added by your tools as you progress through your
flow also, updating the status of the IP as it develops dynamically, or
cataloguing all the IP specifics used by the project.
Once in place the IP properties let the design engineer search for a
specific IP they need and find it quickly; it lets the design manager
see the status of projects and subprojects incorporating IP either being
reused or developed; it lets the design team creating new IP ensure that
everything they need to package up is there.
Definitely looking at this further.
- [ An Anon Engineer ]
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I saw a demo of IC Manage GDP/IP Central at DAC. At first sight, it
seems a good tool, easier to manage (sorry for the pun) versus what
we use now.
However, it's the type of tool that has to be tested on a real test case
to provide a fair judgment; at the moment I have not tested it.
It could be all hype.
- [ An Anon Engineer ]
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We are actively evaluating alternative solutions for IP management.
Currently use Subversion for digital IP, behavioral models, and our
analog IP docs. Our analog IP itself is managed with ClioSoft SOS.
Some of the things we are trying to resolve:
1. Check-in and Checkout performance
2. A centralized IP library with tracking/usage history
3. Consolidate analog and digital IP into one tool
4. Data configuration based on function
5. Easier branching, tagging and merging
IC Manage promised much faster performance which addresses #1.
IP Central seems to address the IP library bullet #2.
IC Manage's GDP platform also has Cadence integration does #3.
DAC demo of configuration and workspace management addressed #4.
I did not get a feel for how #5 is handled.
I came away from DAC thinking that IC Manage had potential for us.
- [ An Anon Engineer ]
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We've been trying to create a methodology for IP reuse for about 5 years.
To do this, we have been stitching together separate revision control and
bug/issue tracking systems with our internally developed database for
tracking usage plus maintaining attributes of our IP blocks.
We saw IP Central at DAC and have since taken a closer look at it. My
comments below are based on our internal experience with IP reuse and
demos of IP Central. We have not yet done an IP Central hands-on eval.
But we have evaluated IC Manage's Global Design Platform (GDP) design
management revision control aspects.
IP Central covers the IP reuse we wanted in a single platform. Here's
what got our interest:
1. Through IP Central/GDP you can *directly* reference the original
IP block versus making a copy. This helps enforce the approach
of using IP "as is" to minimize risk of changes. Alternately, IP
can be used by integration into a project. This allows the IP to
be tweaked to meet project-specific requirements while you still
can trace the IP back to its predecessor.
2. Bugs and issues can be tracked at the IP level. This would allow
us to assess the impact of issues over all of our projects that
have used that IP. Their system notifies end users of IP when
issues are identified. It also allows tracking of issue resolution
on an usage-instance-by-usage instance basis.
3. It works with internal and external IP. We are primarily looking at
reuse of our internal IP. Since we prefer to manage 3rd party in
the same system as our own IP, we would also integrate 3rd party IP
into IP Central. This helps us provide information to design teams
about the 3rd party IP we've bought throughout the company.
4. We can catalog our IP to let our designers find out what's available,
using the property values associated with IP blocks. Properties
would include such things as process technology (TSMC 65 nm), process
options used (LP), function of the IP (FFT), key specifications of
the IP (256-bit, floating point), etc. Designers search for IP based
on searches of properties.
5. IP Central can map IP developed in DesignSync, ClioSoft, or a local
internal IP format, etc. to its own IP Central database; with the
orginal associated scripts preserved.
6. IP Central has APIs to let you communicate with their database. Your
PrimeTime report of your changes to XYZ IP can be directly added to
the data about XYZ IP.
7. Tracking IP reuse is valuable as we grow our central IP development
group. By tracking reuse statistics, we can partition the design
effort between the central services group and the end-product design
teams based on the likelihood an IP function will be reused in the
future. In addition, we are required to track and report the use of
3rd party IP back to the IP vendor.
Based on what I've seen, IP Central has the potential to provide what
we've been trying to do by tying multiple systems together through our
own internally developed scripts and database. No more copying tarballs!
- [ An Anon Engineer ]
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I saw IP Central at DAC and it looked very good. I know that IC Manage
is preferred by quite a few companies. I would need to get hands-on
experience to truly assess it though - something I would like to do if
or when I get the bandwidth.
- [ An Anon Engineer ]
---- ---- ---- ---- ---- ---- ----
We do not use the IP Central package, but at DAC I was shown a demo.
It looked very good, but I do not have more detailed comments on it.
- [ An Anon Engineer ]
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We use IC Manage to manage our design flow data and for IP reuse for our
mixed signal SOC implantable devices. Our IP is ~80-90% proprietary,
and includes critical analog IP blocks, memory , CPU cores, etc.
Below are the EDA design tools that we manage using IC Manage GDP. GDP
allows us to reconfigure the workspaces depending on our project.
- Cadence Virtuoso, custom and technology libraries,
Spectre/AMS, Encounter P&R, Assura DRC/LVS, ELC, ETS,
Conformal - formal verification environments
- Synopsys DC Compile and, Primetime for final sign-off
Some examples of the views we manage are:
- Open Access libraries, DFII test bench views - Cadence
- RTL Testbenches - Verilog, and scripts - Cadence
- Verif scripts for timing and formal verif - Cadence/Synopsys
We manage these views using IC Manage "smart copies", which don't
actually duplicate the data but instead maintain a bi-directional
relationship to the original IP. This way we can keep the revisions and
dependencies associated with the original versions from which they are
derived. These "smart copies" contain a mixture of Cadence and other
vendor tool data, and properties.
We do a tremendous amount of verification at the system level, and have
multiple versions of IC's in production. We use GDP extensively to track
our IP versions and bug fixes, e.g. we find bugs in the IP derivatives
which we then push back up to the earlier generation IP.
- David Genzer of Biotronik
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Magillem IP-XACT Packager (MIP)
- [ An Anon Engineer ]
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