( DAC'17 Item 4 ) ------------------------------------------------- [11/17/17] 

Subject: Genus RTL synthesis gaining traction vs. DC is #4 of Best of 2017

AN RTL SYNTHESIS TIPPING POINT?: A little over 17 years ago, a new business
book came out titled "The Tipping Point" that emphasized how little things
     
now can have a large impact on future events.  It was sort of like the old
scifi "The Butterfly Effect" story; but for business.

Back in the DAC'15 #6 "Best of" report, I wrote on how RTL synthesis tools
were pairing off with PnR tools because...

  "Now, RTL synthesis has evolved into RTL physical synthesis.  It's no
   longer Verilog RTL to gates -- it's now to placed gates -- with power
   CTS, path groups, congestion, layer-awareness, etc. all being brought
   in at that right moment when your gates are being selected and placed."

       - from http://www.deepchip.com/items/dac15-06.html

And how these tool marriages broke out to:

            SNPS DC Graphical married to SNPS ICC or ICC2
                   CDNS Genus married to CDNS Innovus
                   MENT Oasys married to MENT Sierra Olympus-SoC

What makes this interesting is since Innovus has been eating ICC2's lunch
in PnR over the past few years -- we might now be seeing a tipping point
happening in the RTL synthesis market, too.  From the comments below, it
appears that Cadence Genus RTL, when paired with Innvous, is now a credible
threat to Aart's Design Compiler monopoly.

    "In the Soviet Army it takes more courage to retreat than to advance."

        - Joseph Stalin, Soviet Communist dictator (1979 - 1953)

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      QUESTION ASKED:

        Q: "What were the 3 or 4 most INTERESTING specific EDA tools
            you've seen this year?  WHY did they interest you?"

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    Cadence Genus RTL

    We now use Cadence Genus RTL instead of Synopsys Design Compiler
    when we use Innovus for place and route.

    In the past, optimization during synthesis was very important.  You had
    to be able to come up with a good, optimized netlist for P&R, because 
    P&R was not sophisticated enough to sufficiently optimize your design.

    Now that Innovus P&R can do more sizing, optimization, and even logic 
    optimizations, any lack of compatibility has a big cost.  i.e. we want 
    to ensure early estimations and constraints are interpreted the same in
    both CDNS tools, otherwise we miss opportunities which costs us
    in iterations.

    When we used DC with Innovus, we would:

        - Sometimes have to "undo" a lot of the DC synthesis optimizations
          to be able to get to an optimal design that was consistent with
          our Innovus back end.  We'd just do a quick synthesis for that
          reason; to avoid having to "undo" the DC optimizations.  

        - Get stuck in local optimizations.  It would be much harder
          to get the optimal design.

    Genus' compatibility when you take the netlist through Innovus has had
    big benefits for us:

        - The two CDNS tools work well together, so we don't have to
          have different formats -- our constraints are interpreted
          the same way.

        - Genus understands how the physical design will be implemented,
          so it produces a netlist that is easier to close in Innovus.

    Genus 'early physical' understands how the downstream Innovus will be 
    doing P&R, so synthesis could be performed more realistically with 
    accurate information. 

        - Placement information calculated during Genus synthesis were 
          communicated effectively to drive physical implementation tools
          downstream for quicker design convergence.

        - Similarly, Genus' global routing could predict the routing 
          downstream in a way where Innovus' detailed routing is 
          compatible.

        - Genus' timing estimates are also more accurate/predictable 
          related to the final routing.

    This combination means fewer iterations with Genus + Innovus, 
    compared with when we would use DC, and would take longer to converge.

    Genus has good performance, with multi-CPU and multi-threading. 

    We have a lot of datapaths.  Normally PnR tools don't take the datapath
    regularity into account, so we would have to write homegrown scripts
    for datapath planning and PnR.  Innovus is able to more aggressively
    account for datapaths and optimize for them.  

    Genus is getting more popular now -- it used to be just DC -- because
    of the combination of Innovus being more popular and Genus being
    compatible with it.  We them for better PPA and faster turnaround.

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    The company where I work has access to both Synopsys DC/ICC2 and
    Cadence Genus/Innovus.  

    We are working on designs like CPUs, GPUs and communication cores, with
    block sizes upwards of 5M instances.  Both CDNS/SNPS offerings now get
    good results in less than half the time of their legacy products which
    lets us to implement fewer, but larger, blocks in spite of the tighter
    process node reductions.

    Neither tool pair is perfect, but the Cadence set is on balance more 
    deterministic and requires far fewer interations to meet spec.

    It seems that Cadence is taking market share from Synopsys as a result.

    Best/worst things about Cadence

        - BEST: Cadence Genus/Innovus just works.  Both vendors provide 
          reference flows, but there are multiple flavors of reference 
          flows from Synopsys and it's not always clear which one will 
          work best on any given block -- so you must start twiddling
          the various Synopsys options and variables available to get
          their tools to work as you would expect.

          Conversely Cadence's basic reference methodology just works 
          and hits metrics that may have taken weeks to obtain in ICC2.

        - WORST: No major complaints.  Sometimes see the odd synthesis 
          issue from Genus, but nothing that has stopped a project. 
          Perhaps when we start looking at more front-end features
          (e.g. DFT which is currently done outside of Genus), we may
          see more problems.

    Generally, both flavors of synthesis get reasonable post-route results, 
    though we tend to prefer using Genus Physical as it gets better all 
    around PPA results and better correlation front-to-back due to their 
    common placement engine.  

    Compared with DCG, Genus RTL synthesis metrics tend to be a little
    worse on area, but we then see far less area growth through the Innovus
    backend, so the overall final CDNS area tends to be a little lower.

    Genus RTL synthesis tends to map to simpler less complex combinatorial
    logic, so congestion is often better.  Less high input AOIs and more
    appropriate use of MUXes, for example.

    Best/worst things about Synopsys

        - BEST: Vendor Support.  They really do put the hours in to help 
          support our activities.  CNDS support is also good, but we 
          definitely need the SNPS folks help more and to date they have 
          been more than willing to help.

        - WORST: Synopsys DC/ICC2 interface.  Physical synthesis runtime
          in both environments are too long, but at least Innovus re-uses
          the output of Genus RTL directly -- which means that only an 
          incremental placement set is needed with Genus.  

          In SNPS land, we must wait a long time for DCG to finish, then
          we must wait the same time yet again for the placement in ICC2
          to complete.  

    It's sad that SNPS has stepped backward.  DCG/ICC used to work well!

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    Cadence Genus RTL

    Genus + Innovus is a great combo.  This year they finally have a common
    TCL command structure.  

    This is a huge deal for me as now the script writing is all done using 
    the same data model commands and I don't have to remember the different
    access methods for the two tools.  

    I see a huge benefit for it in advanced nodes.  

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    Cadence Genus RTL

    Our Genus wall-clock runtimes have shrunk thanks to 

        - multi-CPU machines
        - LSF
        - multi-threading, and
        - Genus' partition-based synthesis 

    I have also been happy with Genus juggling 3-4 Vt libs and minimizing
    power while at the same time meeting timing.  I have not yet tried Genus
    with an SAIF/VCD file which would provide realistic toggle rates.  

    We routinely use Genus RTL to eval DSP architectural ideas to see what
    gets the lowest area and power.

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    Genus RTL

        - Genus + Innovus gives better PPA than the competition (DC + 
          ICC2), and is faster because of better integration: common 
          database, common engines for placement, routing, and timing.

        - It's working well for us at 16nm and 10nm.

        - It has been showing good results in automotive market.

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    Cadence Genus RTL

    It has good turnaround and works particularly well with the algorithms
    in Innovus.  It's flexible with its algorithms and its reporting.  It
    scripts well with Innovus, too.

    As with Innovus, Genus RTL's underlying distributed approach gets
    pretty good throughput on large blocks.

    We have always believed in a "best point tool solution", so it is 
    great when the point tool comes from one vendor, and when they have 
    thought through the integration like Cadence has.  Since their
    databases talk seamlessly to one another, the throughout we see
    in implementation and analysis is much faster now.

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    Cadence Genus RTL

    I started using Genus for synthesis last year initially in a supporting
    role of creating SDF timing constraints.  

    Another engineer was initially assigned this synthesis job, but was 
    struggling with the timing constraints, so I came in to complete the 
    task.  

    Genus' timing constraint format made it easy for me to develop new 
    constraints quickly. 

    My prior synthesis experience was with Synopsys Design Compiler, 
    which I'd used interactively.  I found Genus' simular interactive
    mode useful in developing constraints on the proper path/pin names. 
 
    I have not yet had the chance to use Genus' physical synthesis, but may
    try it in a future design.

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    We've been using Cadence Genus RTL for 3-4 years.  It takes us only an
    hour to synthesize our 500K gate blocks. 

    I really like Genus + Innovus, especially when compared with our older
    Synopsys DC + Innovus approach.  You can see the difference right away.
    It's lighter and more to the point with Genus.

        - Synthesis vs P&R

          Frontend oriented engineers tend to push synthesis more, 
          without any benefit for backend.  They don't realize that the
          backend tool will throw away a lot of what synthesis does.

          We don't waste time pushing the tool.  We set Genus up to do
          only what makes sense for synthesis, then leave the backend
          to Innovus.

        - RTL input into Genus synthesis

          Genus works best with synthesis-friendly RTL.  It is still not 
          mature enough to catch subtle issues related to poor RTL 
          coding -- though it continues to improve there every year as 
          it matures, and is better than the old Cadence RC ever was.

          With Design Compiler, even if you are not a good RTL designer,
          you can produce a correct netlist.  

          We prefer to invest in good designers and design/lint practices 
          that produce quality RTL, rather than rely on tools to interpret
          design intent.

        - Genus Physical Synthesis

          We haven't used Genus early physical, which uses physical 
          information during the early stages of design.  We did use 
          Synopsys Physical Compiler and DC Topo, but they were too 
          limited in their usefulness in designs with memories and 
          macros, as they were not able to properly account for 
          scan/BIST.

          There is a use case for early physical during synthesis, to
          optimize RTL source code that was not written with a good 
          physical understanding.  Here, physical synthesis lets you
          cut the timing margin during synthesis (e.g., 20% instead of
          40% in a typical 28nm design).  This cuts the burden on the RTL
          frontend design team to understand the physical implementation.
          This approach is usually best in designs with few or small
          memories/macros.

          We do full physically-aware RTL design.  Our architecture and 
          floorplan understanding go hand-in-hand as our designers move
          from micro-architecture to RTL coding.  For example, a designer 
          coding a block with a very large memory spends time with the 
          backend team to understand the physical dimensions of the 
          macro, then he codes access to the memory in a suitable manner
          to meet PD timing.  We can't afford leaving 40% or 20% margin
          on the table.

        - Integration with P&R

          When we would use DC + Innovus -- the flow doesn't work as well
          as with Genus + Innovus.  

          We also have experience with ICC, which is a much polished tool
          as backend goes, and integrates better with DC -- yet we'd still 
          favor Cadence integration because of the great job they've done
          having Genus/Innovus share an almost 100% compatible command
          base.  Scripting is really easy to pass through, saving quite
          a bit of development, and mainly debugging time.  

          The timing correlation between Genus and Innovus is good, as 
          the timing engines are the same (though the extractions may
          be slightly different).  We then do the final timing sign off
          using Tempus.  

        - Fully distributed

          We've used Genus' fully distributed.  Compared with previous
          versions, it has more multi-threading for the base license.
          We use it mostly on blocks and a bit at the top level.

    We used Design Compiler for many years, and when we first started using
    Genus, we noticed it was a "synthesis-person" type of tool, i.e. Genus
    had the right philosophy.

    It's a similar situation to when you compare Calibre to Hercules/PVS.  
    Calibre is definitely the best performing tool yet with the worse user 
    experience in EDA.  With Hercules/PVS it is easy to run a script and 
    understand what you are doing.

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    Cadence Genus RTL

    We've been using Genus for more than a year now. 

    Turnaround time in 2016 took a major step forward. But I haven't seen 
    significant improvements since then, and Genus is not a long pole for 
    our designs.  

    Genus' physical synthesis results are not impressive, but increasing 
    powerful transformations in Innovus have reduced the need/benefit for 
    physical synthesis.  

    Genus still have some QoR problems with different RTL coding styles.
    It seems that while ARM works closely with Cadence, some of the other 
    3rd party IP providers are still Design Compiler houses which can
    make for serious unanticipated corner-case issues in Genus.  

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Related Articles

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    Users say MENT Calibre is still DRC king was #3 in Best of 2017
    Genus RTL synthesis gaining traction vs. DC is #4 of Best of 2017
    IC Manage & Cliosoft get #5 Best 2017; MethodICs & Dassault missing

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