Editor's Note: As promised, here's the edgy questions readers
      submitted for the DAC Troublemaker's Panel in Austin.  - John

( ESNUG 525 Subjects ) ------------------------------------------ [05/28/13]

 Item  1: Edgy questions for Joe Sawicki, GM of DRC/LVS/PNR at Mentor
 Item  2: Edgy questions for Joe Costello, Chairman of Oasys Design
 Item  3: Edgy questions for Dean Drako, CEO of IC Manage
 Item  4: Edgy questions for Mike Gianfagna, VP of Atrenta
 Item  5: Edgy questions for Jim Hogan of Vista Ventures
 Item  6: Edgy questions for Gary Smith of GSEDA
 Item  7: Edgy questions for Aart, Lip-bu, and Simon

============================================================================
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     !!!     "It's not a BUG,               
    /o o\  /  it's a FEATURE!"                 (508) 429-4357
   (  >  )
    \ - /     - John Cooley, EDA & ASIC Design Consultant in Synopsys,
    _] [_         Verilog, VHDL and numerous Design Methodologies.

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   !!!     "It's not a BUG,
  /o o\  /  it's a FEATURE!"
 (  >  )
  \ - / 
  _] [_     (jcooley 1991)