Subject: Cadence acquires Azuro in what was probably an asset fire sale

> SAN JOSE, CA, 12 Jul 2011 - Cadence Design Systems, Inc. blah blah blah
> today announced it has acquired Azuro that blah blah blah has pioneered
> blah blah unique clock concurrent optimization blah blah that has
> delivered blah blah for high-speed processor designs:
>
>  - Power (clock tree power reduction up to 30 percent and total power
>    improvements of up to 10 percent)
>  - Performance (improvements of up to 100 MHz for a GHz design)
>  - Area (clock tree area reduction up to 30 percent)
>
> The blah blah terms of the acquisition were not disclosed.  All blah
> blah key personnel will transition to Cadence.


From: John Cooley <jcooley=user domain=zeroskew not mom>

As the little EDA Start-Up That Couldn't Shoot Straight, I believe that
the Cadence acquisition of Azuro was an asset fire sale.  Why?  Because
even though Azuro might have had some possibly useful technology, they
couldn't market their way out of a wet paper bag!

The first peep of Azuro was in 2005:

 25.) Azuro (booth 112) -- a newbie power optimizer that claims to do 
      magical stuff to your design's clock to get 20% power reduction.

          - from http://www.deepchip.com/gadfly/gad060905.html

Then in 2007-2008, Azuro had Toshiba and NXP publically endorse their
PowerCentric clock tree synthesis (CTS) and gate-level clock gating tool.
But after that initial great start, the Azuro folks never got the word
out about any successes in any *independent* EDA venue.  They stupidly
seemed to think that putting up canned "user" quotes on Azuro.com and
press releases on the business wire was sufficient!  D'oh!

The only time I found Azuro mentioned anywhere by a first-hand user in a
non-Azuro-controlled/non-paid-for web page was again in 2008 in:

   Azuro CTS - made with amazing understanding of CTS complexity, no one
               else implement the CTS with such attention.

     - Dalia Karmon of Zoran
       from http://www.deepchip.com/items/0475-03.html

The problem was this one sole "pro" Azuro user comment was burried in a sea
of "pro" Sequence PowerArtist/Cooltime, Calypto PowerPro, Atrenta user
comments -- not to mention all the low power flow marketing that Synopsys,
Mentor, Cadence, Magma were doing back then, too!

Also in 2008, Azuro was #8 in my DAC'08 Cheesy Must See List.

  8.) All three of the P&R flows claim to do CTS, but if you use them
      they're all crap.  This year one company, Azuro, has made it their
      bread & butter to focus solely on CTS and post-CTS-optimization.
      They claim their PowerCentric tool "reduces clock power by up to
      40%.  Reduces clock area, insertion delay and skew."  Broadcom,
      ST, Nvidia, Toshiba, and TI use PowerCentric, too, so it probably
      works.  Supposedly they have tapeouts in all Big Three P&R flows.
      (booth 601)  Ask for Marc Swinnen.  Freebie: cell phone charger

          - from http://www.deepchip.com/gadfly/gad060608.html

But that was way back in 2008.

After 2009, Azuro stopped exhibiting at DAC, which is the Kiss of Death for
any EDA start-up -- hence my speculation, that despite all the rah-rah
cheering in the Cadence press release, this was probably an Azuro fire sale.
I seriously doubt that Paul Cunningham, co-founder and CEO of Azuro, nor his
VC backers walked away with any gravy dollars in this deal.

Keep in mind that this is just my opinion.  I could be wrong.

    - John Cooley
      DeepChip.com                               Holliston, MA

P.S. One neat thing, though, is that Cadence Encounter users will now get
     Azuro PowerCentric CTS as immediate upgrade add-on.  Cool!