( ESNUG 440 Item 9 ) -------------------------------------------- [03/03/05]
Subject: ( DAC 04 #23 ) PrimeTime-SI Found Our Magma Crosstalk Failures
> PrimeTime is the gold standard for this. The biggest drawback of PT is
> that Synopsys analysis and implementation tools aren't completely
> integrated. Because PT is more sophisticated, it may report problems
> that DC, PhysOpt, or Astro don't see.
>
> - John Busco of Nvidia
From: John Selking <john.selking=user domain=conexant spot gone>
Hi, John,
We recently used PrimeTime-SI, and successfully identified chip failures
due to cross-talk induced hold time violation on our consumer entertainment
chip. I thought our experience may be useful for some of your readers
considering adding a signal integrity tool into their flow.
Our design and design flow:
Transistor count of 50 million, with chip area of 11x11mm in TSMC 0.15 um.
The main clock runs at 230 MHz. The tools:
synthesis: Ambit BuildGates
floorPlan: Magma
place & route: Magama Blast Fusion
clocktree: Magma
extraction: Magma
STA: PrimeTime
We didn't originally use PT-SI for final SI sign off, since past .15 um
designs on smaller chips did not have any SI related failures. Also repair
methodologies between PT-SI and Magma is still being developed. And due
to the chip size, we had concerns at the time about bringing up a new SI
flow and still meeting our tapeout schedule.
Our chip was taped out in mid 2004. When the silicon came back, we noticed
failures on the test floor that look like hold time violation induced
problems. In particular wafer split material showed more sensitivity at
the fast corner split.
We then ran PrimeTime-SI V-2004.06-1 on the design and the first timing
report produced by PT-SI pointed out the paths that failed in the lab.
Further investigation on the clock network illustrated the problem on clock
skews caused by cross talk is the culprit of the hold_time violation. Our
review of the physical layout confirmed that Primetime-SI was properly
reporting a problem with clock skew induced hold violations. A snap-shot
of the timing report that shows the failing path:
Report : timing
-path full_clock_expanded
-delay min
-input_pins
-max_paths 1
-crosstalk_delta
Version: V-2004.06-1
Point Delta Incr Path
----------------------------------------
issue_d_reg_1/CK (sdfftrx1) 0.00000 0.00750 4.30603 r
issue_d_reg_1/Q (sdfftrx1) 0.12121 4.42724 r
issue_d_reg_2/RN (sdfftrx1) -0.00121 -0.00107 4.42617 r
data arrival time 4.42617
issue_d_reg_2/CK (sdfftrx1) 0.00000 0.01077 4.69250 r
library hold time -0.05258 4.63992
data required time 4.63992
-----------------------------------------------------------
data required time 4.63992
data arrival time -4.42617
-----------------------------------------------------------
slack (VIOLATED) -0.21375
Lessons Learned:
- Signal Integrity is a real problem, especially when your chip size gets
large. Using PT-SI for the final sign-off is essential to prevent SI
related failures in silicon.
- PT-SI was easy to incorporate in an our existing Magma design flow,
especially when plain PT was already our STA sign off. The timing
report and clock reporting in PT-SI is easy to use for debugging.
The new save and restore session capability in the 2004.06 release
saves runtime and is handy during debugging.
We plan to use the create_astro_constraint script in PT-SI to generate a
list of nets that have potential crosstalk problems, and use Magma for
fixing. We also plan to use PT-SI noise analysis for sign off. (We
already have the noise library in house.)
- John Selking
Conexant Austin, TX
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