( ESNUG 445 Item 7 ) -------------------------------------------- [05/24/05]
Subject: ( ESNUG 435 #4 ) Aldec Active-HDL 6.3 Crushes Mentor ModelSim
> I noticed that Aldec is really pushing hard their logic simulator
> Active-HDL. I heard that their latest version 6.3 is coming out. Does
> anyone out there use Aldec Active-HDL, and what do they think of it?
> How does it compare to ModelSim?
>
> - Ron Goodstein
> First Shot Design Chestnut Hill, MA
From: Jim Watts <james.e.watts=user company=saic spot gone>
Hi, John,
I have several years of experience using both ModelSim and ActiveHDL, and I
find that each tool has different merits. ModelSim is more widely used, and
was ever so slightly faster when I last benchmarked the two tools a couple
releases ago. I like ActiveHDL's ease of use and it's standard features.
They both support the IEEE standards and libraries. The base versions of
both tools were based comparably as of 6 months ago.
With all of this said, I prefer Active HDL based on it's stability and
support. It's been a couple of years, but some of my co-workers and myself
had issues with ModelSim crashing randomly, forcing us to re-boot our
machines. We also discovered that ModelSim appeared to have memory-leaks
that weren't fixed for several releases. I've had excellent support from
Aldec with any questions I've had.
- Jim Watts
SAIC Saint Petersburg, FL
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From: Howard Lefevre <hlefevre=user company=korelectronics spot gone>
Hi, John,
Well, I have never used ModelSim; when we bought Aldec, several years
ago, the biggest reason was the user interface for Aldec was much better
that what ModelSim had.
We use Aldec for design entry for Xilinx FPGA's. It works well, adding
the Xilinx IP (from CoreGen) is no problem. Simulating the design is
striate forward, and though test benches can be used, they are not
necessary. I have used it on a number of multi million gate designs
(Virtex II XC2V3000, and the Virtex IIP [not using the Power PC]
XC2VP40). It has worked well for us.
Everyone seems to like Aldec, and nobody here has suggested we should
have gotten something else.
- Howard LeFevre
KOR Electronics Cypress, CA
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From: Jeff Frederiksen <jeff=user company=microdisplay spot gone>
Hi John,
Our company uses Aldec Active-VHDL for the PC environment as well as
Cadence NC-VHDL with Debussy (Verdi) for the Linux environment. About
80% of our team prefers Aldec over the NC Debussy combo, but we have a
few died-in-the-wool Linux users. Compared to NC, Active-HDL runs at
comparable speeds, but the great advantage of Aldec is in the design
cycle. The pleasant and easy-to-use environment makes designing a snap
with quick turn-around times on changes. I've also used their Data
Flow diagramming to trace another designer's code. Found it useful.
On the negative side, although Active-HDL works wonderfully for our
Xilinix flow, it was unable to handle the backend verification due
to Cadence or Synopsys library incompatibility.
I've used Aldec-HDL (both Verilog and VHDL) for more than a decade and
find it an excellent tool at a reasonable price. Looking forward
to using their new SystemC support on our next project for testbenching
and "roughing in" new design algorithms.
- Jeff Frederiksen
MicroDisplay Corporation San Pablo, CA
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From: [ I Can't Wait To See Star Wars III ]
Hi, John,
I have recently become a user of Aldec Active HDL. So far I've been
happy with the tools.
Their code editor is one of the best I've used. The operation of the
package is fairly straight-forward (once you understand the paradigm).
Aldec tools all work together very nicely. Active HDL has a (script
driven) Design Flow Manager that works quite well with the mainstream
vendors (Xilinx, Altera, etc.) not so well with less popular vendors.
The program has been extremely robust, but you can crash it if you work
at it. Actually, it's not so much a crash as an "unexpected termination".
Even then, I have been able to restart with no loss of design data.
What sold us on Active HDL was the speed of their simulation engine.
We ran an informal benchmark between Active HDL 6.2 and ModelSim PE
5.8e. Active HDL ran 5X faster -- 6.1 mins on Active HDL vs. 29.9 mins
on ModelSim vs. 50.1 mins on the Xilinix ModelSim OEM version 5.7g.
- [ I Can't Wait To See Star Wars III ]
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From: Arnold Motley <iam=user company=cypress spot gone>
Hello John,
I've been doing VHDL/Verilog design for about 9 years (5 w/ IBM and 4 w/
Cypress Semiconductor). I tried ModelSim about 3 years ago and was very
disappointed with the flow, command structure, tutorials, help files, and
price. After half a day I found ModelSim too frustrating to use and just
gave up on it. There are several guys I work with that have used ModelSim
for several years, and even they had to admit that although Aldec was much
easier to use then ModelSim it was just as powerful a simulator.
When I first started with Aldec it took me about 2 days to come up to speed
enough to finish my first design. After that the tutorials, help files,
and customer support have been extremely helpful to me in filling in the
blanks.
I hate to make this sound like a sales pitch, but when I was looking for a
simulator way back when, an e-mail like this would have really helped.
- Arnold Motley
Cypress Semiconductor Raleigh, NC
---- ---- ---- ---- ---- ---- ----
From: [ Choosy Mothers Choose Jiff ]
Hi, John,
We compared Active-HDL with ModelSim Designer and found:
- Active-HDL was the only tool that could cut & paste diagrams directly
into Microsoft Office.
- Active-HDL was slightly faster for a reference design that I simulated
on both tools. (~24 sec vs. ~31 sec)
Active-HDL has Foundation support while ModelSim Designer does not.
- [ Choosy Mothers Choose Jiff ]
---- ---- ---- ---- ---- ---- ----
From: Scott Munroe <smunroe=user company=phillipsaerospace spot gone>
Hi, John,
I used the Model Tech simulator for many years to simulate Verilog and VHDL
based FPGA designs. I've used the stand-alone version & the Xilinx bundled
version. I used test benches rather than waveform inputs. I was always
satisfied with the performance and features of the program. Originally,
the price was low making ModelSim quite a bargain. I did not use scripting
nor some of the other more advanced features.
I started having performance problems with large designs running on the
throttled Xilinx version of ModelSim. I tried the Aldec ActiveHDL demo and
was surprised at the tremendous improvements they had made in the years
since I had first seen their Xilinx bundled simulator.
I've used ActiveHDL for several months now for VHDL designs and am very
pleased with it. The simulator performance and features are comparable to
those of ModelSim. For FPGA design, at least, it is more than adequate.
The integration of the simulator with the source and library managers is
especially helpful. I appreciate the ease of switching between projects
to make changes to library components. Though I'm not a big fan of
Microsoft (you don't mind the occasional crash do you?) Windows, the
standard Window's features make Aldec easier to use. Also, I don't have
to suffer the Unix-envy of waiting for ModelSim features to migrate from
Unix to Windows.
The integration of the Aldec simulator with the front-end design tools and
library management, and the reasonable price, make it a good bargain.
I recommend it to anyone doing FPGA design.
- Scott Munroe
Phillips Aerospace City of Industry, CA
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