( ESNUG 446 Item 15 ) ------------------------------------------- [09/01/05]
Subject: ( ESNUG 443 #6 ) Simplified Scripts in DC-XG Gets Kick Ass Results
> We decided to try out this new DC XG mode with a top down methodology on
> a chip that we recently taped out. We used DC 2004.06 leveraging XG's
> higher capacity. The final results were interesting:
>
> DC 2003.03 DC 2004.06-SP2 XG Change
> ---------- ----------------- ------
> Area 98 mm2 51 mm2 48% smaller
> Runtime 3 Days 22 hours 3X faster
> Capacity 16 Gb 9 Gb ~2X smaller
> Timing 0 WNS 0 WNS same
>
> To be fair this is not really an apples to apples compassion. With our
> tapeout runs we were limited to doing a bottom up compile with minimal
> re-optimization due to the amount of time and capacity it took to
> synthesize the design. Now with the capacity and runtime improvements
> in XG mode we are able to move to a much simpler and optimal top down.
>
> Basically my synthesis script after reading in the code is fundamentally
> 1 line:
>
> compile -scan
>
> and, had that been available when we synthesized the chip, we could have
> saved 2-3 days of work...
>
> - Marco Brambilla
> STmicroelectronics San Jose, CA
From: Mike Case <mcase=user domain=sgi pot calm>
Hello John,
We recently upgraded to Synopsys DC-XG and are seeing 20% smaller area and
2X faster runtimes with slightly better timing over our 2002.05 based
methodology. We did need to update our scripts though, but it was for the
better as at the end our scripts are now much simpler.
Our 2002.05 based synthesis methodology was unsatisfactory; runtimes were
too slow and QoR mediocre, so we wanted to see if the latest DC release
could meet our needs. Our sales rep brought in an AE to see how they could
help. The Synopsys AE looked at our scripts and recommended some major
simplifications as well as recommended that we move to the 2004.06 release
(that was the latest release available at that time).
Some of the major changes that were made:
- Eliminated multi compile flow to a single compile
- Added power optimization (saves on area also)
- Removed all our complex "uniquification" subscripts
- Added set_ultra_optimization true
The results we got:
2002.05 2004.06(XG) Improvements
Area (cell) 268K 216K 20%
Runtime 6.5 hrs 3 hrs >2X
Timing met met
Our Synopsys AC also ran this design on their latest release 2004.12-SP2
and the results:
2004.06(XG) 2004.12(XG) Improvements
Area (cell) 216K 199K 9%
Runtime 3 hrs 2.4 hrs 0.8X
Timing met met
Overall, this has been a major benefit for us; smaller area, significantly
faster runtime with a much simpler synthesis environment.
- Michael Case
SGI Mountain View, CA
Index
Next->Item
|
|
