( SNUG 03 Item 12 ) ---------------------------------------------- [05/14/03]
Subject: DFT Compiler/TetraMAX vs. Mentor DFT Advisor/Fastscan, LogicVision
BARBARIANS AT THE GATE: Like the Mongol hordes that swept across Asia and
almost broke into Western Europe, Mentor's Fastscan has been mercilessly
taking over Synopsys TetraMAX's home turf. It's brutal. The '99 Dataquest
numbers gave Mentor 24% ATPG market share. In '00, it jumped to 39%. In
this latest reported year, 2001, Mentor now owns 61% market share:
Dataquest FY 2001 ATPG Market (in $ Millions)
Mentor Fastscan ############## $13.7 (61%)
Synopsys TetraMAX ####### $7.0 (31%)
others ## $1.8 (8%)
Whether Fastscan will continue to rule ATPG or eventually yield to TetraMAX
is hard to tell. The user comments are all over the map on which is the
better ATPG tool. I see strong supporters & haters of both sides here.
In the scan insertion market, it's no contest:
Dataquest FY 2001 Scan Insertion Market (in $ Millions)
Synopsys DFT Compiler ######################### $24.6 (91%)
Mentor DFT Advisor ## $1.9 (7%)
others . $0.5 (2%)
Obviously due to its proximity with Design Compiler, DFT Compiler pretty
much rules the scan insertion roost.
"We used Mentor Fastscan. It worked well and has a lot of features that
really fix any problem you might encounter. We had a couple clock
domain-crossing problems and a hold time issue, but these were easily
avoided with a few simple commands, and the coverage was still high
90s. Again, the Mentor support is the best."
- David Frazer of Match Lab, Inc.
"We have been heavy Mentor Fastscan users in the past, but are moving
to Synopsys DFT Compiler/TetraMAX, and SocBIST. Mentor is ahead
somewhat with DFT Advisor, but overall, the quality of the results are
not up to par with the current versions."
- [ An Anon Engineer ]
"Have only used TetraMAX and LogicVision. Corporate policy."
- Brian Schaufenbuel of LSI Logic
"TetraMAX is great. It's non-TCL interface is lousy. We use Fastscan
for research, but I don't really know much about it."
- Santiago Fernandez-Gomez of Pixim, Inc.
"DFT Compiler and Fastscan are both good. Fastscan is more intuitive."
- [ An Anon Engineer ]
"I'm not personally involved with this, but we use TetraMAX and
LogicVision."
- Lance Flake of Maxtor
"I think TetraMAX is the only tool where there is a lead over Mentor's
test tools, otherwise DFT Compiler and BSD Compiler are quite primitive
and unrobust. If TetraMAX can add more fault models, it will become
the tool of the next generation, otherwise Mentor will beat it. Mentor
has some capabilities and features where it is ahead."
- Amit Sanghani of Nvidia
"I believe we used Fastscan, but we'll probably have to switch to
DFT Compiler to match our ASIC vendor if we do another good sized
chip with them."
- [ An Anon Engineer ]
"We used Fastscan, but were talking about moving to TetraMAX."
- Tom Thatcher, ex-Agilent and looking
"BSD Compiler would be a better tool if it could handle multiple tap
controllers in a design."
- Gregg Lahti of Microchip
"We use Synopsys DFT Compiler for scan-insertaion plus Mentor's Fastscan
and TestKompress for ATPG. That works fine."
- Markus Schutti of Infineon
"I've demo'd the Synopsys flow, and used Mentor tools. Like the Mentor
flow, their test tools work well. Our next design will use Mentor."
- [ An Anon Engineer ]
"Our DFT experts use TetraMAX, having moved away from Fastscan. Their
reasons are:
- TetraMAX is faster.
- TetraMAX provides better coverage.
- our synthesis environnment is Synopsys and STIL files are
automatically generated.
Problems can be intimately associated with our synthesis environment,
and so Synopsys is better able to work on them."
- Alan Duffy of Motorola
"I think DFT Compiler/TetraMAX have the upper hand on Mentor at this
point. It appears from the outside that Mentor needs to invest in an
overhaul in their DFT tool suite. Of course, don't ask me what I'm
having to use for DFT!!! (Company politics.)
I liked the look of Synopsys SoC BIST, but I think it needs to handle
many more clock domains to be effective in real SoC designs. (My last
SoC design had 15 distinct clock domains, and more are coming.)"
- [ An Anon Engineer ]
"A few years ago, tried Synopsys DFT Compiler scan insert, then went
with our own scripts to avoid paying $40K for the 'extra' feature.
Used TetraMAX two devices ago, but it did not seem to be heading in
the LogicBIST direction.
We now use LogicVision, brought them into Agere (the previous method
they were using here was about 10 years old, externally broadside
applied SCAN). The Logicvision results are great, LogicBIST is
working great at ATE right now. The steps getting to a completed
design are fraught with pitfalls, but we are adding some management
scripts on-top of their newest version (4.0) to get us through for the
current design effort.
Looked at all of the other tools, TetraMAX, Mentor, Cadence, etc. None
of them had the smarts of the LogicVision LogicBIST, in particular for
dealing with clock crossings: we have approx 180 clock domains in our
device, so dealing with clock crossing was critical!!"
- Bob Lawrence of Agere Systems
"Mentor has been strong in test but since Synopsys 'acquired' the
knowledge and put a GUI on top of Fastscan and called it TetraMAX,
they are the one to prefer. Fair debugging environment. Switching
from Fastscan to TetraMAX there is no big step, some name changes of
commands."
- Bengt-Erik Embretsen of Zarlink Semiconductor
"Fastscan vs. TetraMAX
Some features standard in TetraMAX appear to be an optional feature in
Fastscan (i.e., DFT Insight schematic viewer). This schematic viewer
should be standard for debugging purposes. Design bring-up appears to
be easier in TetraMAX as far as getting libraries and configuration
files setup for ATPG. The work environment and user interface (layout
of the GUI) is easier to navigate and more intuitive in TetraMAX.
However, Fastscan currently appears to be slightly more powerful. For
a design that takes a week to generate 1000 basic scan patterns in
TetraMAX, Fastscan can do it in ~2.5x faster with same number of
patterns and very close to the coverage of TetraMAX. Also, the pattern
manipulation features in Fastscan appear to be more powerful and with
more options plus pattern sorting and compression.
Once those patterns are generated, TetraMAX has a slight advantage in
that it can write out a more customized formated pattern file. For
example, TetraMAX has the ability to write out padded scan vectors in
WGL as well as other formats."
- John York of ATI, Inc.
"I think that Synopsys and Mentor test are in the same level for 90% of
straight forward designs. Most of the people will move to Synopsys
because they sell entire flow."
- [ An Anon Engineer ]
"Mentor was easier to use than Synopsys; never tried Cadence."
- [ An Anon Engineer ]
"Fastscan by all means. Test compression especially for delay fault
TDLs is much better in Fastscan. DFT Compiler and DFT Advisor have
equal favour. (Probably there is a little bit of inclination in DFT
towards DFT Advisor, but that is because of Fastscan's simplicity and
TetraMAX's complexity.) Haven't used TestKompress or Mem BIST."
- [ An Anon Engineer ]
"Mentor's DFT Advisor needs better checking ability. It will gladly
build scan chains that Fastscan fails to trace. TetraMAX and Fastscan
are about par in ATPG, however Fastscan's pattern compression is
superior --> fewer patterns at the same fault coverage = lower test
costs = higher profits. Mentor has finally improved DFT Insight but
still can't beat TetraMAX's graphical debug. Fastscan is available on
Linux, not sure about TetraMAX.
We spin our own JTAG and never has a need for BSD tools."
- [ An Anon Engineer ]
"I use DFT Compiler for scan insertion and TetraMAX ATPG for pattern
generation. I also use BSD Compiler for compliance checking. DFT
Compiler has one major advantage over all the other products; it is
integrated in both the synthesis and physical synthesis flows. I
usually don't run it myself. I only communicate to the designers
which options to use. The current version of DFT Compiler lacks a
lot of reporting and debug capabilities. In this regards Mentor's
DFT Adviser is much more ahead. I still prefer to use DFT Compiler
because of the tight integration with DC. My philosophy is to tackle
DFT problems at the source (RTL) and so far only Synopsys provides
that early access to DFT related violations with RTL DRC."
- Amar Guettaf of Broadcom
|
|
