( SNUG 07 Item 5 ) ----------------------------------------------- [03/25/08]
Subject: Design Compiler vs. Cadence Get2chip/Ambit vs. Magma Blast Create
DESIGN COMPILER SLIPPING -- Watch the Synopsys DC percentages in the RTL
synthesis share data below. First we have 2002:
Dataquest FY 2002 RTL Synthesis Market (in $ Millions)
Synopsys DC ###################################### $132.7 (90%)
Cadence Ambit ### $8.8 (6%)
Synplify ASIC # $2.9 (2%)
Get2chip # $2.9 (2%)
Then 3 years later, the 2005 usage numbers:
2005 - In your opinion, how does Design Compiler rank against its rivals
Cadence Get2chip, Ambit, Synplicity ASIC, Magma Blast Create,
Incentia in your eyes? Which synthesis are you using now?
Synopsys DC ################################### 82%
Cadence Ambit # 3%
Synplify ASIC ## 6%
Cadence Get2chip ######### 21%
Magma Blast Create ##### 11%
Incentia . 1%
Compare this to now, 2 years later, the 2007 usage numbers:
2007 - How does Design Compiler rank against its rivals Cadence Get2chip
RTL Compiler, Ambit, Magma Blast Create, Synplicity ASIC, Incentia
in your eyes? Which synthesis is your project using now?
Synopsys DC ############################# 67%
Cadence Ambit # 3%
Synplify ASIC # 2%
Cadence Get2chip ########## 22%
Magma Blast Create ######### 21%
Incentia # 2%
90%, 82%, 67% -- DC is slipping! I called Gary Smith for a sanity check.
"I see the same thing. DC is losing synthesis market share. Synthesis
is no longer the driving point tool, but has become a utility in a complete
flow," said Gary. "Engineers are now happy to start using whatever
synthesis tool that comes in a package deal."
"DC is still the best synthesis out there; there's no question about that,"
added Gary. "A normal market leader usually has a 60% market share."
So it now appears that competitive benchmarks will decide some synthesis
buying decisions, with package deals making up for the remainder.
---- ---- ---- ---- ---- ---- ----
Tested DC 2006.x vs Blast Create 4.3x. Some limitations in BlastCreate
for specialized RTL constructs & latch based design, for "normal use"
compared results after Placement and Magma Synthesis + Magma Placement
had better QOR than synopsys synthesis + Synopsys Placement (PC). Can't
evaluate results after Magma synthesys only as it is not a fully
optimized netlist (drive strenghts), so must always go through some
placement optimization for an even comparison.
Ended up using Synopsys due to "business reasons".
- [ An Anon Engineer ]
We're using Cadence RTL Compiler - we'd possibly prefer to use DC, but
we do mixed-signal with our own custom analog and RF, so for pricing and
convenience of a single CAD vendor we use a Cadence flow for everything.
(Until now we have used PrimePower, but we've moved over to Cadence
for that, too)
- [ An Anon Engineer ]
We're using Design Compiler. But in the last project, we post-processed
the netlist with RTL Compiler prior to running it through Cadence backend
flow, and squeezed out an extra 3-5% area for each of 5 layout blocks.
That's big, in my mind! I wouldn't touch Synplicity ASIC.
- [ An Anon Engineer ]
We were using DC in our present and previous projects. However, we have
found DC crashing again and again on its 2007.03 version (with all its
SPs). Synopsys provided us a company specific release too, but even that
is crashing. We have filed many STARs on DC which are still open.
While this is frustrating, we will continue to rely on DC since our next
tool is ICC. I don't want to sit and change my constraints for another
tool in the middle of a project. Might look at others for the next
project.
- [ An Anon Engineer ]
In my experience of using both DC and RTL Compiler, the QOR seems to be
design dependent (with DC generally better at datapath intensive logic)
and also tool release dependent, i.e. the latest release of RTL Compiler
may give better results (area,runtime,timing) than DC until the new
version of DC is released and vice versa.
RTL Compiler was claiming to beat DC on area a lot early on but in my
opinion that was mainly because RTL Compiler defaulted to aggressive
optimizations settings (e.g. boundary opt, constant reg opt) whereas DC
used not default to having these options on. They do tend to now though!
- [ An Anon Engineer ]
DC is still the winner. Comparing the Magma BC where the runtimes can be
massive. We use both DC and Magma BC.
- [ An Anon Engineer ]
DC is still the best IMHO. Please bear in mind I'm talking about
mixed language support. As a consultant I don't have the luxury of
using just Verilog - it's almost always mixed Verilog & VHDL.
Cadence/Get2Chip/Ambit - still has integration and ease of use issues.
You have to work harder to get good results.
Magma Blast Create - maybe okay for pure verilog - an absolute disaster
for VHDL (i.e sucks harder than an a Electrolux vacuum...)
Synplicity ASIC - where've you been? - it's discontinued - ie not
supported, gone, kaput...
Incentia - decent verilog, not as good for VHDL.
Xilinx ISE - still a toy VHDL compiler, barely useful for Verilog.
Altera Quartus II - rapidly my favorite tool for both VHDL and
Verilog - it now handles SDC timing input for seamless transition
to ASIC
Yes, John, real ASIC designers still need FPGA synthesis, too...
- [ An Anon Engineer ]
Better or same for high performance design against Cadence/Magma - not
checked relative to others
- [ An Anon Engineer ]
Only use DC.
- [ An Anon Engineer ]
DC is medium in class. Use Magma Blast Create.
- Giovanni Bezzi of Nokia Siemens Networks
DC ranks as-good-as or better against other syn tools. We use DC-T.
- [ An Anon Engineer ]
Best to worst:
RTL Compiler
DC
Blast Create
Ambit
Dunno about Synplicity/Incentia. Using both RTL Compiler and DC.
- [ An Anon Engineer ]
We started with DC in 1993, moved to Ambit BG in 1998, used BG till 2006,
now use DC. DC has advanced much since we used it in the 90's. BG was
used to tape-out 180 nm, 130 nm design, no synthesis lacks. Friendly
interface, good QoR, constraint compatibility with DC. After was asked
Cadence to move from BG to RTL C, chose DC to have common tools with
design center. Currently DC meets our needs for front-end synthesis.
No P&R at out site. No experience with RC and others.
- [ An Anon Engineer ]
Haven't compared against rivals. We're using DC-Topo at the moment.
- [ An Anon Engineer ]
We are using Design Compiler. In the past 13 or 14 years, I have tried
Ambit once and the old Compass synthesis tool and those were a step or
two behind in quality.
- [ An Anon Engineer ]
1-RTL Compiler, 2-Design Compiler, etc. Using Ambit
- [ An Anon Engineer ]
We are using Magma Blast Create.
- [ An Anon Engineer ]
Our company moved to Magma after getting much better results with fewer
coredumps.
- [ An Anon Engineer ]
We use Synopsys for ASIC. I am using Synplicity for an FPGA project.
- [ An Anon Engineer ]
DC was the only tool of its type in use at legacy-Agere (pre-
acquisition). Now at LSI, there is one team using Magma, but DC is
still the mainline tool. Yes we look at the others periodically,
but the concensus is DC is still good enough not to change away from.
- [ An Anon Engineer ]
We use DC. I've been a heavy Ambit user before and in my opinion
was better until Cadence started disinvesting in them.
- [ An Anon Engineer ]
Like it a little better than Get2chip RTL compiler. Don't have any
experience with the others. Using Design Compiler.
- Gautham Kamath of Cirrus Logic
DC is okay, I'm currently using BlastCreate
- [ An Anon Engineer ]
DC is still best. I have tried RTL Compiler and Ambit PKS. RC7.1 still
has problems reading RTL. But RC R&D team provides quick workaround.
- [ An Anon Engineer ]
I've only used DC in real designs. I've tried Synplify ASIC (which is no
longer available) and loved it. I love Synplicity for FPGAs! Every time
I do a design (once every other year) in DC I relive extreme frustrations
at the cumbersome interface including painful entry and lack of useful
feedback.
- Jared Bytheway of Cirque Corp.
I don't think Synplicity's Synplify ASIC still exists.
- [ An Anon Engineer ]
FYI, we pulled out of the ASIC synthesis market in March 2006 as we
mentioned in our Q1 2006 quarterly results press release.
- Andy Haines of Synplicity, Inc.
Currently attempting to integrate Magma into our flow - still following
a learning curve on it. DC is still better because we've had much more
experience with it, but we're starting to hate the plethora of commands
and switch options. Using Design Compiler.
- [ An Anon Engineer ]
Since we are most familiar with DC we seem to get better results from it.
We use RTL Compiler and it still is "faster" than DC. I'm pretty sure
Cadence is no longer doing anything with Ambit. Don't use Magma,
Synplicity or Incentia. I don't believe Incentia is in the running
anymore. As an IP company we support what our customers want.
Today that is DC and RC.
- [ An Anon Engineer ]
DC-Topo is better across the board. RC has always been interesting, but
"3rd in line". Currently using Magma synthesis due to full integration
with Magma backend. (Prefer to give up any DC-Topo advantage to overall
integrated use model - better program TPT seen w/Magma integration)
- [ An Anon Engineer ]
We are using DC-Ultra including DC-Topo functions right now and that
is working well with a Cadence backend flow.
- [ An Anon Engineer ]
DC requires lots of scripting, which is great if you have the scripts
already written, and you want to preserve your skills in twriting the
scripts. We opted for Cadence RTL Compiler. Why, we had no legacy
scripts, we didn't need to learn how to write DC scripts, and the low
power (pre CPF flow) looked good.
- David Schwan of Sirenza Microdevices
We use Design Compiler. In the past we used Get2Chip/Cadence RTL
Compiler which gave better results. But compile_ultra is better and
we keep using it. We are doing an experiment to compare BlastCreate
with DC.
- [ An Anon Engineer ]
I have only tried DC and have been fairly happy with it.
- Tom Mannos of Sandia National Laboratories
Magma, and Simplicity are close in comparison with Design Compiler
but Cadence has no hope to match them.
- [ An Anon Engineer ]
Design Compiler standard here.
- Jerome Poidevin of Atmel
Design Compiler, especially their latest incarnation in the form of
DC-Topo consistently ranks higher then its rivals. DC is currently being
used, with DC-Topo being evaluated.
- [ An Anon Engineer ]
Magma BlastCreate is better integrated, but less stable than DC.
- [ An Anon Engineer ]
Ambit. DC and DC-TOPO.
- [ An Anon Engineer ]
All our projects are using DC. We recently did an evalution of RTL
Compiler. The QoR was comparable, the run-time (due to multi-treading)
was better, SDC 1.7 was not supported.
- [ An Anon Engineer ]
DC definitely outperformed Cadence. Haven't tried others.
- Phuong Nguyen of Mindspeed
Incentia's DesignCraft does good job for our company's projects. It
handles 0.25, 0.18 and 0.13 um logic synthesis very good. Command
interface is very similiar to DC so it's very easy to pickup if
engineers are familiar with DC. I have no complaints about this
tool. We are using Incentia now.
- [ An Anon Engineer ]
Currently use Synopsys DC/PC/Astro. Changed from DC/PC/Cadence-SE.
Tried Encounter, Ambit, which stank. Wouldn't consider using Cadence
for anything, except simulation (NC). No experience with Magma.
- [ An Anon Engineer ]
SNPS rulez.
- [ An Anon Engineer ]
Using DC Ultra. Have used Synplicity ASIC at a previous job and was
generally very pleased with it. Speed at that time was orders faster
than DC and QOR was about the same starting from a very simple script.
- [ An Anon Engineer ]
For timing critical IP, we use Design Compiler. For the rest,
Magma Blast Create.
- [ An Anon Engineer ]
RTL Compiler is much better than DC-Topo.
- [ An Anon Engineer ]
We found that RTL Compiler had faster times and provided greater accuracy
than DC.
- [ An Anon Engineer ]
Design Compiler
- Jordan Krim of Seagate
DC is still the synthesis standard to beat. Blast Create appears to be
newer, perhaps cleaner technology with things like high fanout net
handling built in instead of requiring hacks to clock-tree generation
for resets and scan enables like DC does. Still using DC but evaluating
Magma's entire flow.
- [ An Anon Engineer ]
DC/PC/ICC
- John Stiles of Silicon Logic Engineering
We were a long time Design Compiler customers and we evaluated Cadence's
RTL Compiler. We were surprised that our synthesis results were better
with RTL compiler. Timing 10-15% improvement and Power 20-30% better.
We now use RTL Compiler.
- [ An Anon Engineer ]
DC is still the leader but Cadence RTL Compiler and Magma Talus/Blast
are closing the gap. Using DC, Blast/Talus and some RC
- [ An Anon Engineer ]
DC/RC:
DC and it's issues are known to me. So it is my default. Last 2 years,
it has become as fast as RC, and the DB has shrunk enough to run a
serious design through.
RC is fast, nimble. I like the timing reports better in RC (esp the
pointer to the line in the constraints file). The translation from SDC
to RC tcl constraints was painful (been a year so so since I played
with it).
Synplicity:
My current project is using Simplify, another uses RC. Symplicty is at
least 5 years behind the usability curve of ASIC tools. Wild differenced
between runs, based on minor RTL changes. Abysmal timing constraints.
Terrible documentation. If ISE and Quartus were any better (they are
not), we'd never buy a copy.
MY KINGDOM for one of the failed EDA-PKS/SYN companies to come in and
usurp Symplicity.
- [ An Anon Engineer ]
We use Blast Create for synthesis and we also have DC. In terms of the
final P&R QOR, I don't see any significant difference between the Blast
Create netlist and the DC netlist. Magma has a shortcoming in the form
of scan compression. They don't have an equivalent of DFTmax and so if
we want to use scan compression, the DC-DFTmax flow is a lot more
streamlined than the BlastCreate-DFTmax flow.
- Jay Pragasam of PLX Tech.
DC is a tool I've used for 15 years. It's biggest flaw from a usage
standpoint IMO is the endless list of variable settings. This is where
RTL compiler is better. Although, I find DC very easy to use, but I've
been using it a long time. It's like a rash you just learn to live
with. :-) I am currently using DC on a project.
- [ An Anon Engineer ]
DC and RC are the tools here. They're fairly interchangeable. RC has
a slight QoR lead, but DC has stronger test integration.
- Jonathan Bahl of COT Consulting, Inc.
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