Editor's Note: I snagged Dean Drako's IP Reuse 2.0 "vision"
speech that he gave to DV Club last month. I liked that it's
swimming with new IP reuse survey data. Enjoy. - John
( ESNUG 520 Subjects ) ------------------------------------------ [03/07/13]
Item 1: New data from 372 engineers and managers surveyed on real IP reuse
Item 2: And some more survey data on verification headaches and IP reuse
Item 3: Dean Drako posits his design and verification IP Reuse 2.0 vision
Item 4: 10 design and verification "best practices" for IP Reuse 2.0 today
Item 5: The Show-Me-The-Money IP Reuse 2.0 ROI and what IC Manage does
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Read what 33,018 engineers REALLY think of the EDA/IP/FAB tools they use!
!!! "It's not a BUG, 
/o o\ / it's a FEATURE!" (508) 429-4357
( > )
\ - / - John Cooley, EDA & ASIC Design Consultant in Synopsys,
_] [_ Verilog, VHDL and numerous Design Methodologies.
Holliston Poor Farm, P.O. Box 6222, Holliston, MA 01746-6222
Legal Disclaimer: "As always, anything said here is only opinion."
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